[Qemu-devel] [PATCH 00/29] QIDL: First Batch of Device Conversions

[Qemu-devel] [PATCH 00/29] QIDL: First Batch of Device Conversions

[Michael Roth]

These patches are based are qidl-base-v6, and can also be obtained from:

git://github.com/mdroth/qemu.git qidl-conv1-v1

This adds QIDL declarations/annotations and QOM state properties for the
following devices (with their default path assignments for a basic QEMU
invocation):

            PCI: /machine/i440fx/pci.0/state
      piix3-ide: /machine/unattached/device[22]/state
    mc146818rtc: /machine/unattached/device[11]/state
           hpet: /machine/unattached/device[10]/state
     cirrus-vga: /machine/unattached/device[9]/state
          PIIX3: /machine/unattached/device[6]/state
         i440FX: /machine/unattached/device[5]/state
     pci-bridge: /machine/peripheral-anon/device[0]/state

This serialized state information will eventually be used as an
intermediate, dynamic (via QObject) representation of device state to
allow for arbitrary manipulations of state representation during migration
(post-serialize for outgoing, pre-deserialization for incoming). A future
series will teach VMState how to map it's existing struct fields/offsets
to fields within these dynamic state objects to fully de-couple the
migration wire protocol from our internal representations of device state.
Future wire protocols can also potentially make use of this framework.

What to expect from this:

For now, we put these annotations in place to facilitate the practice of
properly marking guest state as immutable/derived/etc. By default, we
assume state is mutable and attempt to serialize it. This can cause
build breakage for developers modifying converted devices structures
as the QIDL parser is not currently capable of parsing all types of
declarations it encounters, and in some cases how to parse something
is inherantly ambiguous and requires input from the developer
(requiring a q_size()/q_immutable/q_derived marker for a uint32_t*, for
instance). The risk here is mostly on the build side, however, as the
state properties we generate are not yet in any critical path. As the
parser becomes more mature these situations will lesson, and we can
potentially make the parser smarter about anticipating such situations
and providing useful steps on how to fix them to minimize the impact to
normal development.

The plan is to get all standard PC devices converted over and make
migration capable of utilizing serialized state by 1.4, ideally starting
with 1.3, if that seems reasonable.

 Makefile            |    3 ++-
 hw/cirrus_vga.c     |   72 ++++++++++++++++++++++++++++++++++++++++++++-------
 hw/hpet.c           |   40 +++++++++++++++++++++++-----
 hw/ide/core.c       |   12 +++++++--
 hw/ide/internal.h   |   69 +++++++++++++++++++++++++++---------------------
 hw/ide/isa.c        |   39 ++++++++++++++++++++++++++--
 hw/ide/pci.c        |    9 +++++--
 hw/ide/pci.h        |   31 +++++++++++++---------
 hw/ide/piix.c       |   39 ++++++++++++++++++++++++++++
 hw/ide/qdev.c       |    2 ++
 hw/isa-bus.c        |    4 +++
 hw/isa.h            |    3 ++-
 hw/mc146818rtc.c    |   49 +++++++++++++++++++++++++----------
 hw/msix.c           |   12 ++++++---
 hw/pci.c            |   40 +++++++++++++++++++---------
 hw/pci.h            |   54 ++++++++++++++++++++++----------------
 hw/pci_bridge.c     |    4 +++
 hw/pci_bridge_dev.c |   35 +++++++++++++++++++++++--
 hw/pci_internals.h  |   36 ++++++++++++++------------
 hw/piix_pci.c       |   66 +++++++++++++++++++++++++++++++++++++++++-----
 hw/shpc.c           |   42 ++++++++++++++++++------------
 hw/shpc.h           |   17 +++++++-----
 hw/vga_int.h        |   25 ++++++++++--------
 qemu-timer.c        |   29 +++++++++++++++++++++
 qemu-timer.h        |    4 +++
 qidl.h              |    6 +++++
 26 files changed, 565 insertions(+), 177 deletions(-)

[Qemu-devel] [PATCH 01/29] qemu-timer: add QEMUTimer visitor

[Michael Roth]

We'll use this for serializing rtc and elsewhere

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 Makefile     |    3 ++-
 qemu-timer.c |   29 +++++++++++++++++++++++++++++
 qemu-timer.h |    4 ++++
 3 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index b575361..f2d2e70 100644
--- a/Makefile
+++ b/Makefile
@@ -172,7 +172,8 @@ qemu-img.o: qemu-img-cmds.h
 
 tools-obj-y = $(oslib-obj-y) $(trace-obj-y) qemu-tool.o qemu-timer.o \
 	qemu-timer-common.o main-loop.o notify.o \
-	iohandler.o cutils.o iov.o async.o error.o
+	iohandler.o cutils.o iov.o async.o error.o \
+	$(qapi-obj-y) $(qobject-obj-y)
 tools-obj-$(CONFIG_POSIX) += compatfd.o
 
 qemu-img$(EXESUF): qemu-img.o $(tools-obj-y) $(block-obj-y)
diff --git a/qemu-timer.c b/qemu-timer.c
index ede84ff..ef2ec6a 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -30,6 +30,7 @@
 #include "hw/hw.h"
 
 #include "qemu-timer.h"
+#include "qapi/qapi-visit-core.h"
 
 #ifdef _WIN32
 #include <mmsystem.h>
@@ -61,6 +62,34 @@ struct QEMUTimer {
     int scale;
 };
 
+void visit_type_QEMUTimer(Visitor *v, QEMUTimer **obj, const char *name,
+                          Error **errp)
+{
+    int64_t expire_time, expire_time_cpy;
+
+    if (error_is_set(errp)) {
+        return;
+    }
+    if (!obj || !*obj) {
+        error_set(errp, QERR_INVALID_PARAMETER_VALUE, name ? name : NULL,
+                  "non-NULL QEMUTimer");
+        return;
+    }
+    expire_time = expire_time_cpy = qemu_timer_expire_time_ns(*obj);
+    visit_start_struct(v, NULL, "QEMUTimer", name, 0, errp);
+    visit_type_int64(v, &expire_time, "expire_time", errp);
+    visit_end_struct(v, errp);
+
+    /* if we're modifying a QEMUTimer, re-arm/delete accordingly */
+    if (expire_time != expire_time_cpy) {
+        if (expire_time != -1) {
+            qemu_mod_timer_ns(*obj, expire_time);
+        } else {
+            qemu_del_timer(*obj);
+        }
+    }
+}
+
 struct qemu_alarm_timer {
     char const *name;
     int (*start)(struct qemu_alarm_timer *t);
diff --git a/qemu-timer.h b/qemu-timer.h
index da7e97c..3d3d9d6 100644
--- a/qemu-timer.h
+++ b/qemu-timer.h
@@ -4,6 +4,7 @@
 #include "qemu-common.h"
 #include "main-loop.h"
 #include "notify.h"
+#include "qapi/qapi-visit-core.h"
 
 #ifdef __FreeBSD__
 #include <sys/param.h>
@@ -67,6 +68,9 @@ int64_t cpu_get_ticks(void);
 void cpu_enable_ticks(void);
 void cpu_disable_ticks(void);
 
+void visit_type_QEMUTimer(Visitor *v, QEMUTimer **obj, const char *name,
+                          Error **errp);
+
 static inline QEMUTimer *qemu_new_timer_ns(QEMUClock *clock, QEMUTimerCB *cb,
                                            void *opaque)
 {
-- 
1.7.9.5

[Qemu-devel] [PATCH 02/29] qidl: qidl.h, mark common immutable types as q_immutable by default

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 qidl.h |    6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/qidl.h b/qidl.h
index 8d8dd7b..c80ccf7 100644
--- a/qidl.h
+++ b/qidl.h
@@ -42,6 +42,7 @@
 
 #define QIDL(...) QIDL(__VA_ARGS__)
 #define QIDL_START(name, ...) QIDL_START(name, ##__VA_ARGS__)
+#define QIDL_IMMUTABLE_TYPES(...) QIDL_IMMUTABLE_TYPES(__VA_ARGS__)
 
 #else
 
@@ -50,6 +51,7 @@
     QIDL_DATA_DECLARE(name) \
     extern QIDLData##name qidl_data_##name; \
     void visit_type_##name(Visitor *, struct name **, const char *, Error **);
+#define QIDL_IMMUTABLE_TYPES(...)
 #ifdef QIDL_ENABLED
 #define QIDL_START(name, ...) \
     QIDL_DATA_DECLARE(name) \
@@ -159,4 +161,8 @@
 #define QIDL_PROPERTIES(name) \
     qidl_data_##name.properties
 
+QIDL_IMMUTABLE_TYPES(Notifier, MemoryRegion, MemoryRegionIoeventfd, \
+                     DeviceState, BusState, DMAContext, qemu_irq, \
+                     SysBusDevice)
+
 #endif
-- 
1.7.9.5

[Qemu-devel] [PATCH 03/29] isa: qidl_declare ISADevice

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/isa-bus.c |    4 ++++
 hw/isa.h     |    3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index 685fdc0..821a16c 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -22,6 +22,10 @@
 #include "sysemu.h"
 #include "isa.h"
 #include "exec-memory.h"
+#include "qidl.h"
+
+QIDL_ENABLE()
+QIDL_IMPLEMENT_PUBLIC(ISADevice)
 
 static ISABus *isabus;
 hwaddr isa_mem_base = 0;
diff --git a/hw/isa.h b/hw/isa.h
index f9382e8..8f8e6c2 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -6,6 +6,7 @@
 #include "ioport.h"
 #include "memory.h"
 #include "qdev.h"
+#include "qidl.h"
 
 #define ISA_NUM_IRQS 16
 
@@ -31,7 +32,7 @@ struct ISABus {
     qemu_irq *irqs;
 };
 
-struct ISADevice {
+QIDL_DECLARE_PUBLIC(ISADevice) {
     DeviceState qdev;
     uint32_t isairq[2];
     int nirqs;
-- 
1.7.9.5

[Qemu-devel] [PATCH 04/29] rtc: qidl_declare RTCState

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/mc146818rtc.c |   15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index 98839f2..8983d26 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -25,6 +25,7 @@
 #include "qemu-timer.h"
 #include "sysemu.h"
 #include "mc146818rtc.h"
+#include "qidl.h"
 
 #ifdef TARGET_I386
 #include "apic.h"
@@ -56,12 +57,14 @@
 #define RTC_CLOCK_RATE            32768
 #define UIP_HOLD_LENGTH           (8 * NSEC_PER_SEC / 32768)
 
-typedef struct RTCState {
+typedef struct RTCState RTCState;
+
+QIDL_DECLARE(RTCState) {
     ISADevice dev;
     MemoryRegion io;
     uint8_t cmos_data[128];
     uint8_t cmos_index;
-    int32_t base_year;
+    int32_t q_property("base_year", 1980) base_year;
     uint64_t base_rtc;
     uint64_t last_update;
     int64_t offset;
@@ -77,11 +80,13 @@ typedef struct RTCState {
     uint16_t irq_reinject_on_ack_count;
     uint32_t irq_coalesced;
     uint32_t period;
-    QEMUTimer *coalesced_timer;
+    bool has_coalesced_timer;
+    QEMUTimer q_optional *coalesced_timer;
     Notifier clock_reset_notifier;
-    LostTickPolicy lost_tick_policy;
+    LostTickPolicy q_property("lost_tick_policy", LOST_TICK_DISCARD) \
+        lost_tick_policy;
     Notifier suspend_notifier;
-} RTCState;
+};
 
 static void rtc_set_time(RTCState *s);
 static void rtc_update_time(RTCState *s);
-- 
1.7.9.5

[Qemu-devel] [PATCH 05/29] rtc: use qidl-generated properties

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/mc146818rtc.c |   11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index 8983d26..10492a1 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -27,6 +27,8 @@
 #include "mc146818rtc.h"
 #include "qidl.h"
 
+QIDL_ENABLE()
+
 #ifdef TARGET_I386
 #include "apic.h"
 #endif
@@ -881,13 +883,6 @@ ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq)
     return dev;
 }
 
-static Property mc146818rtc_properties[] = {
-    DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980),
-    DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", RTCState,
-                               lost_tick_policy, LOST_TICK_DISCARD),
-    DEFINE_PROP_END_OF_LIST(),
-};
-
 static void rtc_class_initfn(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
@@ -895,7 +890,7 @@ static void rtc_class_initfn(ObjectClass *klass, void *data)
     ic->init = rtc_initfn;
     dc->no_user = 1;
     dc->vmsd = &vmstate_rtc;
-    dc->props = mc146818rtc_properties;
+    dc->props = QIDL_PROPERTIES(RTCState);
 }
 
 static TypeInfo mc146818rtc_info = {
-- 
1.7.9.5

[Qemu-devel] [PATCH 06/29] rtc: add qom property for RTCState state

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/mc146818rtc.c |   23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index 10492a1..d5c0b5a 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -807,6 +807,23 @@ static void rtc_get_date(Object *obj, Visitor *v, void *opaque,
     visit_end_struct(v, errp);
 }
 
+static void rtc_get_state(Object *obj, Visitor *v, void *opaque,
+                          const char *name, Error **errp)
+{
+    ISADevice *isa = ISA_DEVICE(obj);
+    RTCState *s = DO_UPCAST(RTCState, dev, isa);
+    QIDL_VISIT_TYPE(RTCState, v, &s, name, errp);
+}
+
+static void rtc_set_state(Object *obj, Visitor *v, void *opaque,
+                          const char *name, Error **errp)
+{
+    ISADevice *isa = ISA_DEVICE(obj);
+    RTCState *s = DO_UPCAST(RTCState, dev, isa);
+    QIDL_VISIT_TYPE(RTCState, v, &s, name, errp);
+    rtc_post_load(s, 3);
+}
+
 static int rtc_initfn(ISADevice *dev)
 {
     RTCState *s = DO_UPCAST(RTCState, dev, dev);
@@ -834,6 +851,7 @@ static int rtc_initfn(ISADevice *dev)
 #ifdef TARGET_I386
     switch (s->lost_tick_policy) {
     case LOST_TICK_SLEW:
+        s->has_coalesced_timer = true;
         s->coalesced_timer =
             qemu_new_timer_ns(rtc_clock, rtc_coalesced_timer, s);
         break;
@@ -861,7 +879,10 @@ static int rtc_initfn(ISADevice *dev)
     qemu_register_reset(rtc_reset, s);
 
     object_property_add(OBJECT(s), "date", "struct tm",
-                        rtc_get_date, NULL, NULL, s, NULL);
+                        rtc_get_date, rtc_get_date, NULL, s, NULL);
+    object_property_add(OBJECT(s), "state", "RTCState",
+                        rtc_get_state, rtc_set_state, NULL, s, NULL);
+    QIDL_SCHEMA_ADD_LINK(RTCState, OBJECT(s), "state_schema", NULL);
 
     return 0;
 }
-- 
1.7.9.5

[Qemu-devel] [PATCH 07/29] pci: qidl_declare PCIDevice + PCIBus

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/msix.c          |   12 ++++++++----
 hw/pci.c           |    5 +++++
 hw/pci.h           |   53 +++++++++++++++++++++++++++++-----------------------
 hw/pci_internals.h |   28 ++++++++++++++-------------
 4 files changed, 58 insertions(+), 40 deletions(-)

diff --git a/hw/msix.c b/hw/msix.c
index 136ef09..117f5ed 100644
--- a/hw/msix.c
+++ b/hw/msix.c
@@ -271,17 +271,19 @@ int msix_init(struct PCIDevice *dev, unsigned short nentries,
     dev->wmask[cap + MSIX_CONTROL_OFFSET] |= MSIX_ENABLE_MASK |
                                              MSIX_MASKALL_MASK;
 
-    dev->msix_table = g_malloc0(table_size);
-    dev->msix_pba = g_malloc0(pba_size);
+    dev->msix_table_size = table_size;
+    dev->msix_table = g_malloc0(dev->msix_table_size);
+    dev->msix_pba_size = pba_size;
+    dev->msix_pba = g_malloc0(dev->msix_pba_size);
     dev->msix_entry_used = g_malloc0(nentries * sizeof *dev->msix_entry_used);
 
     msix_mask_all(dev, nentries);
 
     memory_region_init_io(&dev->msix_table_mmio, &msix_table_mmio_ops, dev,
-                          "msix-table", table_size);
+                          "msix-table", dev->msix_table_size);
     memory_region_add_subregion(table_bar, table_offset, &dev->msix_table_mmio);
     memory_region_init_io(&dev->msix_pba_mmio, &msix_pba_mmio_ops, dev,
-                          "msix-pba", pba_size);
+                          "msix-pba", dev->msix_pba_size);
     memory_region_add_subregion(pba_bar, pba_offset, &dev->msix_pba_mmio);
 
     return 0;
@@ -359,10 +361,12 @@ void msix_uninit(PCIDevice *dev, MemoryRegion *table_bar, MemoryRegion *pba_bar)
     memory_region_destroy(&dev->msix_pba_mmio);
     g_free(dev->msix_pba);
     dev->msix_pba = NULL;
+    dev->msix_pba_size = 0;
     memory_region_del_subregion(table_bar, &dev->msix_table_mmio);
     memory_region_destroy(&dev->msix_table_mmio);
     g_free(dev->msix_table);
     dev->msix_table = NULL;
+    dev->msix_table_size = 0;
     g_free(dev->msix_entry_used);
     dev->msix_entry_used = NULL;
     dev->cap_present &= ~QEMU_PCI_CAP_MSIX;
diff --git a/hw/pci.c b/hw/pci.c
index dceda0b..cfef76a 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -35,6 +35,11 @@
 #include "msix.h"
 #include "exec-memory.h"
 
+QIDL_ENABLE()
+
+QIDL_IMPLEMENT_PUBLIC(PCIDevice)
+QIDL_IMPLEMENT_PUBLIC(PCIBus)
+
 //#define DEBUG_PCI
 #ifdef DEBUG_PCI
 # define PCI_DPRINTF(format, ...)       printf(format, ## __VA_ARGS__)
diff --git a/hw/pci.h b/hw/pci.h
index 241c1d8..e356fbd 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -187,37 +187,39 @@ typedef int (*MSIVectorUseNotifier)(PCIDevice *dev, unsigned int vector,
                                       MSIMessage msg);
 typedef void (*MSIVectorReleaseNotifier)(PCIDevice *dev, unsigned int vector);
 
-struct PCIDevice {
+QIDL_DECLARE_PUBLIC(PCIDevice) {
     DeviceState qdev;
 
     /* PCI config space */
-    uint8_t *config;
+    uint8_t *config \
+        q_size((pci_is_express(*obj) ? \
+                       PCIE_CONFIG_SPACE_SIZE : PCI_CONFIG_SPACE_SIZE));
 
     /* Used to enable config checks on load. Note that writable bits are
      * never checked even if set in cmask. */
-    uint8_t *cmask;
+    uint8_t q_immutable *cmask;
 
     /* Used to implement R/W bytes */
-    uint8_t *wmask;
+    uint8_t q_immutable *wmask;
 
     /* Used to implement RW1C(Write 1 to Clear) bytes */
-    uint8_t *w1cmask;
+    uint8_t q_immutable *w1cmask;
 
     /* Used to allocate config space for capabilities. */
-    uint8_t *used;
+    uint8_t q_immutable *used;
 
     /* the following fields are read only */
     PCIBus *bus;
-    int32_t devfn;
-    char name[64];
-    PCIIORegion io_regions[PCI_NUM_REGIONS];
-    AddressSpace bus_master_as;
+    int32_t q_property("addr", -1) devfn;
+    char q_string name[64];
+    PCIIORegion q_immutable io_regions[PCI_NUM_REGIONS];
+    AddressSpace q_immutable bus_master_as;
     MemoryRegion bus_master_enable_region;
     DMAContext *dma;
 
     /* do not access the following fields */
-    PCIConfigReadFunc *config_read;
-    PCIConfigWriteFunc *config_write;
+    PCIConfigReadFunc q_immutable *config_read;
+    PCIConfigWriteFunc q_immutable *config_write;
 
     /* IRQ objects for the INTA-INTD pins.  */
     qemu_irq *irq;
@@ -226,7 +228,10 @@ struct PCIDevice {
     uint8_t irq_state;
 
     /* Capability bits */
-    uint32_t cap_present;
+    uint32_t \
+        q_property("multifunction", QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false) \
+        q_property("command_serr_enable", QEMU_PCI_CAP_SERR_BITNR, true) \
+        cap_present;
 
     /* Offset of MSI-X capability in config space */
     uint8_t msix_cap;
@@ -235,15 +240,17 @@ struct PCIDevice {
     int msix_entries_nr;
 
     /* Space to store MSIX table & pending bit array */
-    uint8_t *msix_table;
-    uint8_t *msix_pba;
+    int32_t msix_table_size;
+    uint8_t *msix_table q_size(msix_table_size);
+    int32_t msix_pba_size;
+    uint8_t *msix_pba q_size(msix_pba_size);
     /* MemoryRegion container for msix exclusive BAR setup */
     MemoryRegion msix_exclusive_bar;
     /* Memory Regions for MSIX table and pending bit entries. */
     MemoryRegion msix_table_mmio;
     MemoryRegion msix_pba_mmio;
     /* Reference-count for entries actually in use by driver. */
-    unsigned *msix_entry_used;
+    unsigned q_immutable *msix_entry_used;
     /* MSIX function mask set or MSIX disabled */
     bool msix_function_masked;
     /* Version id needed for VMState */
@@ -253,23 +260,23 @@ struct PCIDevice {
     uint8_t msi_cap;
 
     /* PCI Express */
-    PCIExpressDevice exp;
+    PCIExpressDevice q_broken exp; /* TODO: qidl, is PCIEAERLog guest-visible? */
 
     /* SHPC */
-    SHPCDevice *shpc;
+    SHPCDevice q_broken *shpc; /* TODO: qidl, needed for pci-bridge support */
 
     /* Location of option rom */
-    char *romfile;
+    char q_property("romfile") *romfile;
     bool has_rom;
     MemoryRegion rom;
-    uint32_t rom_bar;
+    uint32_t q_property("rombar", 1) rom_bar;
 
     /* INTx routing notifier */
-    PCIINTxRoutingNotifier intx_routing_notifier;
+    PCIINTxRoutingNotifier q_immutable intx_routing_notifier;
 
     /* MSI-X notifiers */
-    MSIVectorUseNotifier msix_vector_use_notifier;
-    MSIVectorReleaseNotifier msix_vector_release_notifier;
+    MSIVectorUseNotifier q_immutable msix_vector_use_notifier;
+    MSIVectorReleaseNotifier q_immutable msix_vector_release_notifier;
 };
 
 void pci_register_bar(PCIDevice *pci_dev, int region_num,
diff --git a/hw/pci_internals.h b/hw/pci_internals.h
index 21d0ce6..bf40dc6 100644
--- a/hw/pci_internals.h
+++ b/hw/pci_internals.h
@@ -15,29 +15,31 @@
 #define TYPE_PCI_BUS "PCI"
 #define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS)
 
-struct PCIBus {
+typedef struct PCIBus PCIBus;
+
+QIDL_DECLARE_PUBLIC(PCIBus) {
     BusState qbus;
-    PCIDMAContextFunc dma_context_fn;
-    void *dma_context_opaque;
+    PCIDMAContextFunc q_immutable dma_context_fn;
+    void q_immutable *dma_context_opaque;
     uint8_t devfn_min;
-    pci_set_irq_fn set_irq;
-    pci_map_irq_fn map_irq;
-    pci_route_irq_fn route_intx_to_irq;
-    pci_hotplug_fn hotplug;
+    pci_set_irq_fn q_immutable set_irq;
+    pci_map_irq_fn q_immutable map_irq;
+    pci_route_irq_fn q_immutable route_intx_to_irq;
+    pci_hotplug_fn q_immutable hotplug;
     DeviceState *hotplug_qdev;
-    void *irq_opaque;
-    PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
-    PCIDevice *parent_dev;
+    void q_immutable *irq_opaque;
+    PCIDevice q_elsewhere *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
+    PCIDevice q_elsewhere *parent_dev;
     MemoryRegion *address_space_mem;
     MemoryRegion *address_space_io;
 
-    QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
-    QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
+    QLIST_HEAD(, PCIBus) q_immutable child; /* this will be replaced by qdev later */
+    QLIST_ENTRY(PCIBus) q_immutable sibling;/* this will be replaced by qdev later */
 
     /* The bus IRQ state is the logical OR of the connected devices.
        Keep a count of the number of devices with raised IRQs.  */
     int nirq;
-    int *irq_count;
+    int *irq_count q_size(nirq);
 };
 
 typedef struct PCIBridgeWindows PCIBridgeWindows;
-- 
1.7.9.5

[Qemu-devel] [PATCH 08/29] pci: use qidl_declare'd properties for TYPE_PCI_DEVICE

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/pci.c |   13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/hw/pci.c b/hw/pci.c
index cfef76a..271ca2f 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -52,17 +52,6 @@ static char *pcibus_get_dev_path(DeviceState *dev);
 static char *pcibus_get_fw_dev_path(DeviceState *dev);
 static int pcibus_reset(BusState *qbus);
 
-static Property pci_props[] = {
-    DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1),
-    DEFINE_PROP_STRING("romfile", PCIDevice, romfile),
-    DEFINE_PROP_UINT32("rombar",  PCIDevice, rom_bar, 1),
-    DEFINE_PROP_BIT("multifunction", PCIDevice, cap_present,
-                    QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false),
-    DEFINE_PROP_BIT("command_serr_enable", PCIDevice, cap_present,
-                    QEMU_PCI_CAP_SERR_BITNR, true),
-    DEFINE_PROP_END_OF_LIST()
-};
-
 static void pci_bus_class_init(ObjectClass *klass, void *data)
 {
     BusClass *k = BUS_CLASS(klass);
@@ -2142,7 +2131,7 @@ static void pci_device_class_init(ObjectClass *klass, void *data)
     k->unplug = pci_unplug_device;
     k->exit = pci_unregister_device;
     k->bus_type = TYPE_PCI_BUS;
-    k->props = pci_props;
+    k->props = QIDL_PROPERTIES(PCIDevice);
 }
 
 void pci_setup_iommu(PCIBus *bus, PCIDMAContextFunc fn, void *opaque)
-- 
1.7.9.5

[Qemu-devel] [PATCH 09/29] pci: add qom property for PCIBus instances

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/pci.c |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/hw/pci.c b/hw/pci.c
index 271ca2f..e0b3f4f 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -34,6 +34,7 @@
 #include "msi.h"
 #include "msix.h"
 #include "exec-memory.h"
+#include "qidl.h"
 
 QIDL_ENABLE()
 
@@ -268,6 +269,22 @@ int pci_find_domain(const PCIBus *bus)
     return -1;
 }
 
+static void pcibus_get_state(Object *obj, Visitor *v, void *opaque,
+                             const char *name, Error **errp)
+{
+    PCIBus *pci_bus = PCI_BUS(obj);
+
+    QIDL_VISIT_TYPE(PCIBus, v, &pci_bus, name, errp);
+}
+
+static void pcibus_set_state(Object *obj, Visitor *v, void *opaque,
+                             const char *name, Error **errp)
+{
+    PCIBus *pci_bus = PCI_BUS(obj);
+
+    QIDL_VISIT_TYPE(PCIBus, v, &pci_bus, name, errp);
+}
+
 void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
                          const char *name,
                          MemoryRegion *address_space_mem,
@@ -285,6 +302,10 @@ void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
     pci_host_bus_register(0, bus); /* for now only pci domain 0 is supported */
 
     vmstate_register(NULL, -1, &vmstate_pcibus, bus);
+
+    object_property_add(OBJECT(bus), "state", "PCIBus",
+                        pcibus_get_state, pcibus_set_state, NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(PCIBus, OBJECT(bus), "state_schema", NULL);
 }
 
 PCIBus *pci_bus_new(DeviceState *parent, const char *name,
-- 
1.7.9.5

[Qemu-devel] [PATCH 10/29] vga: qidl_declare VGACommonState

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/vga_int.h |   25 ++++++++++++++-----------
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/hw/vga_int.h b/hw/vga_int.h
index 22f1706..074e5d5 100644
--- a/hw/vga_int.h
+++ b/hw/vga_int.h
@@ -25,6 +25,7 @@
 #include <hw/hw.h>
 #include "error.h"
 #include "memory.h"
+#include "qidl.h"
 
 #define ST01_V_RETRACE      0x08
 #define ST01_DISP_ENABLE    0x01
@@ -84,9 +85,11 @@ struct VGACommonState;
 typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
 typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
 
-typedef struct VGACommonState {
+typedef struct VGACommonState VGACommonState;
+
+QIDL_DECLARE(VGACommonState) {
     MemoryRegion *legacy_address_space;
-    uint8_t *vram_ptr;
+    uint8_t q_immutable *vram_ptr;
     MemoryRegion vram;
     MemoryRegion vram_vbe;
     uint32_t vram_size;
@@ -130,7 +133,7 @@ typedef struct VGACommonState {
     uint32_t vbe_bank_mask;
     int vbe_mapped;
     /* display refresh support */
-    DisplayState *ds;
+    DisplayState q_immutable *ds;
     uint32_t font_offsets[2];
     int graphic_mode;
     uint8_t shift_control;
@@ -150,10 +153,10 @@ typedef struct VGACommonState {
     uint32_t cursor_offset;
     unsigned int (*rgb_to_pixel)(unsigned int r,
                                  unsigned int g, unsigned b);
-    vga_hw_update_ptr update;
-    vga_hw_invalidate_ptr invalidate;
-    vga_hw_screen_dump_ptr screen_dump;
-    vga_hw_text_update_ptr text_update;
+    vga_hw_update_ptr q_immutable update;
+    vga_hw_invalidate_ptr q_immutable invalidate;
+    vga_hw_screen_dump_ptr q_immutable screen_dump;
+    vga_hw_text_update_ptr q_immutable text_update;
     /* hardware mouse cursor support */
     uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
     void (*cursor_invalidate)(struct VGACommonState *s);
@@ -162,11 +165,11 @@ typedef struct VGACommonState {
     uint32_t last_palette[256];
     uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
     /* retrace */
-    vga_retrace_fn retrace;
-    vga_update_retrace_info_fn update_retrace_info;
-    union vga_retrace retrace_info;
+    vga_retrace_fn q_immutable retrace;
+    vga_update_retrace_info_fn q_immutable update_retrace_info;
+    union vga_retrace q_immutable retrace_info;
     uint8_t is_vbe_vmstate;
-} VGACommonState;
+};
 
 static inline int c6_to_8(int v)
 {
-- 
1.7.9.5

[Qemu-devel] [PATCH 11/29] cirrus: qidl_declare PCICirrusVGAState + CirrusVGAState

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/cirrus_vga.c |   19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index e4af2e9..f9c8b46 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -31,6 +31,7 @@
 #include "console.h"
 #include "vga_int.h"
 #include "loader.h"
+#include "qidl.h"
 
 /*
  * TODO:
@@ -196,7 +197,9 @@ typedef void (*cirrus_bitblt_rop_t) (struct CirrusVGAState *s,
 typedef void (*cirrus_fill_t)(struct CirrusVGAState *s,
                               uint8_t *dst, int dst_pitch, int width, int height);
 
-typedef struct CirrusVGAState {
+typedef struct CirrusVGAState CirrusVGAState;
+
+QIDL_DECLARE(CirrusVGAState) {
     VGACommonState vga;
 
     MemoryRegion cirrus_linear_io;
@@ -229,11 +232,11 @@ typedef struct CirrusVGAState {
     uint32_t cirrus_blt_srcaddr;
     uint8_t cirrus_blt_mode;
     uint8_t cirrus_blt_modeext;
-    cirrus_bitblt_rop_t cirrus_rop;
+    cirrus_bitblt_rop_t q_immutable cirrus_rop;
 #define CIRRUS_BLTBUFSIZE (2048 * 4) /* one line width */
     uint8_t cirrus_bltbuf[CIRRUS_BLTBUFSIZE];
-    uint8_t *cirrus_srcptr;
-    uint8_t *cirrus_srcptr_end;
+    uint8_t q_derived *cirrus_srcptr;
+    uint8_t q_derived *cirrus_srcptr_end;
     uint32_t cirrus_srccounter;
     /* hwcursor display state */
     int last_hw_cursor_size;
@@ -244,12 +247,14 @@ typedef struct CirrusVGAState {
     int real_vram_size; /* XXX: suppress that */
     int device_id;
     int bustype;
-} CirrusVGAState;
+};
 
-typedef struct PCICirrusVGAState {
+typedef struct PCICirrusVGAState PCICirrusVGAState;
+
+QIDL_DECLARE(PCICirrusVGAState) {
     PCIDevice dev;
     CirrusVGAState cirrus_vga;
-} PCICirrusVGAState;
+};
 
 typedef struct ISACirrusVGAState {
     ISADevice dev;
-- 
1.7.9.5

[Qemu-devel] [PATCH 12/29] cirrus: add qom property for cirrus-vga state

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/cirrus_vga.c |   24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index f9c8b46..9b27317 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -33,6 +33,8 @@
 #include "loader.h"
 #include "qidl.h"
 
+QIDL_ENABLE()
+
 /*
  * TODO:
  *    - destination write mask support not complete (bits 5..7)
@@ -2939,6 +2941,23 @@ static TypeInfo isa_cirrus_vga_info = {
  *
  ***************************************/
 
+static void pci_cirrus_vga_get_state(Object *obj, Visitor *v, void *opaque,
+                                     const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PCICirrusVGAState *s = DO_UPCAST(PCICirrusVGAState, dev, pci);
+    QIDL_VISIT_TYPE(PCICirrusVGAState, v, &s, name, errp);
+}
+
+static void pci_cirrus_vga_set_state(Object *obj, Visitor *v, void *opaque,
+                                     const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PCICirrusVGAState *s = DO_UPCAST(PCICirrusVGAState, dev, pci);
+    QIDL_VISIT_TYPE(PCICirrusVGAState, v, &s, name, errp);
+    cirrus_post_load(&s->cirrus_vga, -1);
+}
+
 static int pci_cirrus_vga_initfn(PCIDevice *dev)
 {
      PCICirrusVGAState *d = DO_UPCAST(PCICirrusVGAState, dev, dev);
@@ -2971,6 +2990,11 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
      if (device_id == CIRRUS_ID_CLGD5446) {
          pci_register_bar(&d->dev, 1, 0, &s->cirrus_mmio_io);
      }
+
+    object_property_add(OBJECT(d), "state", "PCICirrusVGAState",
+                        pci_cirrus_vga_get_state, pci_cirrus_vga_set_state,
+                        NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(PCICirrusVGAState, OBJECT(d), "state_schema", NULL);
      return 0;
 }
 
-- 
1.7.9.5

[Qemu-devel] [PATCH 13/29] cirrus: qidl_declare ISACirrusVGAState

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/cirrus_vga.c |    8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index 9b27317..220525a 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -258,10 +258,12 @@ QIDL_DECLARE(PCICirrusVGAState) {
     CirrusVGAState cirrus_vga;
 };
 
-typedef struct ISACirrusVGAState {
-    ISADevice dev;
+typedef struct ISACirrusVGAState ISACirrusVGAState;
+
+QIDL_DECLARE(ISACirrusVGAState) {
+    ISADevice dev q_immutable;
     CirrusVGAState cirrus_vga;
-} ISACirrusVGAState;
+};
 
 static uint8_t rop_to_index[256];
 
-- 
1.7.9.5

[Qemu-devel] [PATCH 14/29] cirrus: add qom property for isa-cirrus-vga

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/cirrus_vga.c |   21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index 220525a..4f00758 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -2903,6 +2903,23 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
  *
  ***************************************/
 
+static void isa_cirrus_vga_get_state(Object *obj, Visitor *v, void *opaque,
+                                     const char *name, Error **errp)
+{
+    ISADevice *isa = ISA_DEVICE(obj);
+    ISACirrusVGAState *s = DO_UPCAST(ISACirrusVGAState, dev, isa);
+    QIDL_VISIT_TYPE(ISACirrusVGAState, v, &s, name, errp);
+}
+
+static void isa_cirrus_vga_set_state(Object *obj, Visitor *v, void *opaque,
+                                     const char *name, Error **errp)
+{
+    ISADevice *isa = ISA_DEVICE(obj);
+    ISACirrusVGAState *s = DO_UPCAST(ISACirrusVGAState, dev, isa);
+    QIDL_VISIT_TYPE(ISACirrusVGAState, v, &s, name, errp);
+    cirrus_post_load(&s->cirrus_vga, -1);
+}
+
 static int vga_initfn(ISADevice *dev)
 {
     ISACirrusVGAState *d = DO_UPCAST(ISACirrusVGAState, dev, dev);
@@ -2918,6 +2935,10 @@ static int vga_initfn(ISADevice *dev)
     rom_add_vga(VGABIOS_CIRRUS_FILENAME);
     /* XXX ISA-LFB support */
     /* FIXME not qdev yet */
+    object_property_add(OBJECT(d), "state", "ISACirrusVGAState",
+                        isa_cirrus_vga_get_state, isa_cirrus_vga_set_state,
+                        NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(ISACirrusVGAState, OBJECT(d), "state_schema", NULL);
     return 0;
 }
 
-- 
1.7.9.5

[Qemu-devel] [PATCH 15/29] i440fx: qidl_declare PCII440FXState

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/piix_pci.c |    9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 9af5847..a4c32aa 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -30,6 +30,7 @@
 #include "sysbus.h"
 #include "range.h"
 #include "xen.h"
+#include "qidl.h"
 
 /*
  * I440FX chipset data sheet.
@@ -68,12 +69,14 @@ typedef struct PIIX3State {
     int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
 } PIIX3State;
 
-typedef struct PAMMemoryRegion {
+typedef struct PAMMemoryRegion PAMMemoryRegion;
+
+QIDL_DECLARE(PAMMemoryRegion) {
     MemoryRegion alias[4];  /* index = PAM value */
     unsigned current;
-} PAMMemoryRegion;
+};
 
-struct PCII440FXState {
+QIDL_DECLARE(PCII440FXState) {
     PCIDevice dev;
     MemoryRegion *system_memory;
     MemoryRegion *pci_address_space;
-- 
1.7.9.5

[Qemu-devel] [PATCH 16/29] i440fx: a qom property for i440FX state

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/piix_pci.c |   24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index a4c32aa..563ded6 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -32,6 +32,8 @@
 #include "xen.h"
 #include "qidl.h"
 
+QIDL_ENABLE()
+
 /*
  * I440FX chipset data sheet.
  * http://download.intel.com/design/chipsets/datashts/29054901.pdf
@@ -241,6 +243,23 @@ static int i440fx_pcihost_initfn(SysBusDevice *dev)
     return 0;
 }
 
+static void i440fx_get_state(Object *obj, Visitor *v, void *opaque,
+                             const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PCII440FXState *s = DO_UPCAST(PCII440FXState, dev, pci);
+    QIDL_VISIT_TYPE(PCII440FXState, v, &s, name, errp);
+}
+
+static void i440fx_set_state(Object *obj, Visitor *v, void *opaque,
+                             const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PCII440FXState *s = DO_UPCAST(PCII440FXState, dev, pci);
+    QIDL_VISIT_TYPE(PCII440FXState, v, &s, name, errp);
+    i440fx_post_load(s, -1);
+}
+
 static int i440fx_initfn(PCIDevice *dev)
 {
     PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev);
@@ -248,6 +267,11 @@ static int i440fx_initfn(PCIDevice *dev)
     d->dev.config[I440FX_SMRAM] = 0x02;
 
     cpu_smm_register(&i440fx_set_smm, d);
+
+    object_property_add(OBJECT(d), "state", "PCII440FXState",
+                        i440fx_get_state, i440fx_set_state, NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(PCII440FXState, OBJECT(d), "state_schema", NULL);
+
     return 0;
 }
 
-- 
1.7.9.5

[Qemu-devel] [PATCH 17/29] piix3: qidl_declare PIIX3State

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/piix_pci.c |    8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 563ded6..0242399 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -48,7 +48,9 @@ typedef struct I440FXState {
 #define XEN_PIIX_NUM_PIRQS      128ULL
 #define PIIX_PIRQC              0x60
 
-typedef struct PIIX3State {
+typedef struct PIIX3State PIIX3State;
+
+QIDL_DECLARE(PIIX3State) {
     PCIDevice dev;
 
     /*
@@ -65,11 +67,11 @@ typedef struct PIIX3State {
 #endif
     uint64_t pic_levels;
 
-    qemu_irq *pic;
+    qemu_irq q_immutable *pic;
 
     /* This member isn't used. Just for save/load compatibility */
     int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
-} PIIX3State;
+};
 
 typedef struct PAMMemoryRegion PAMMemoryRegion;
 
-- 
1.7.9.5

[Qemu-devel] [PATCH 18/29] piix3: add qom property for PIIX3 state

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/piix_pci.c |   25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 0242399..a867e3f 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -544,12 +544,37 @@ static const VMStateDescription vmstate_piix3 = {
     }
 };
 
+static void piix3_get_state(Object *obj, Visitor *v, void *opaque,
+                            const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PIIX3State *s = DO_UPCAST(PIIX3State, dev, pci);
+
+    piix3_pre_save(s);
+    QIDL_VISIT_TYPE(PIIX3State, v, &s, name, errp);
+}
+
+static void piix3_set_state(Object *obj, Visitor *v, void *opaque,
+                            const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PIIX3State *s = DO_UPCAST(PIIX3State, dev, pci);
+
+    QIDL_VISIT_TYPE(PIIX3State, v, &s, name, errp);
+    piix3_post_load(s, -1);
+}
+
 static int piix3_initfn(PCIDevice *dev)
 {
     PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev);
 
     isa_bus_new(&d->dev.qdev, pci_address_space_io(dev));
     qemu_register_reset(piix3_reset, d);
+
+    object_property_add(OBJECT(d), "state", "PIIX3State",
+                        piix3_get_state, piix3_set_state, NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(PIIX3State, OBJECT(d), "state_schema", NULL);
+
     return 0;
 }
 
-- 
1.7.9.5

[Qemu-devel] [PATCH 19/29] shpc: qidl_declare SHPCDevice

[Michael Roth]

Also add a config_size field which we will use later to track the config
size for serialization and replace unnecessary uses of SHPC_SIZEOF() with

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/shpc.c |   42 ++++++++++++++++++++++++++----------------
 hw/shpc.h |   17 +++++++++++------
 2 files changed, 37 insertions(+), 22 deletions(-)

diff --git a/hw/shpc.c b/hw/shpc.c
index 4597bbd..92af357 100644
--- a/hw/shpc.c
+++ b/hw/shpc.c
@@ -6,6 +6,10 @@
 #include "pci.h"
 #include "pci_internals.h"
 #include "msi.h"
+#include "qidl.h"
+
+QIDL_ENABLE()
+QIDL_IMPLEMENT_PUBLIC(SHPCDevice)
 
 /* TODO: model power only and disabled slot states. */
 /* TODO: handle SERR and wakeups */
@@ -193,7 +197,7 @@ void shpc_reset(PCIDevice *d)
     SHPCDevice *shpc = d->shpc;
     int nslots = shpc->nslots;
     int i;
-    memset(shpc->config, 0, SHPC_SIZEOF(d));
+    memset(shpc->config, 0, shpc->config_size);
     pci_set_byte(shpc->config + SHPC_NSLOTS, nslots);
     pci_set_long(shpc->config + SHPC_SLOTS_33, nslots);
     pci_set_long(shpc->config + SHPC_SLOTS_66, 0);
@@ -392,10 +396,10 @@ static void shpc_write(PCIDevice *d, unsigned addr, uint64_t val, int l)
 {
     SHPCDevice *shpc = d->shpc;
     int i;
-    if (addr >= SHPC_SIZEOF(d)) {
+    if (addr >= shpc->config_size) {
         return;
     }
-    l = MIN(l, SHPC_SIZEOF(d) - addr);
+    l = MIN(l, shpc->config_size - addr);
 
     /* TODO: code duplicated from pci.c */
     for (i = 0; i < l; val >>= 8, ++i) {
@@ -415,10 +419,10 @@ static void shpc_write(PCIDevice *d, unsigned addr, uint64_t val, int l)
 static uint64_t shpc_read(PCIDevice *d, unsigned addr, int l)
 {
     uint64_t val = 0x0;
-    if (addr >= SHPC_SIZEOF(d)) {
+    if (addr >= d->shpc->config_size) {
         return val;
     }
-    l = MIN(l, SHPC_SIZEOF(d) - addr);
+    l = MIN(l, d->shpc->config_size - addr);
     memcpy(&val, d->shpc->config + addr, l);
     return val;
 }
@@ -571,10 +575,11 @@ int shpc_init(PCIDevice *d, PCIBus *sec_bus, MemoryRegion *bar, unsigned offset)
         return -EINVAL;
     }
     shpc->nslots = nslots;
-    shpc->config = g_malloc0(SHPC_SIZEOF(d));
-    shpc->cmask = g_malloc0(SHPC_SIZEOF(d));
-    shpc->wmask = g_malloc0(SHPC_SIZEOF(d));
-    shpc->w1cmask = g_malloc0(SHPC_SIZEOF(d));
+    shpc->config_size = SHPC_SIZEOF(d);
+    shpc->config = g_malloc0(shpc->config_size);
+    shpc->cmask = g_malloc0(shpc->config_size);
+    shpc->wmask = g_malloc0(shpc->config_size);
+    shpc->w1cmask = g_malloc0(shpc->config_size);
 
     shpc_reset(d);
 
@@ -612,7 +617,7 @@ int shpc_init(PCIDevice *d, PCIBus *sec_bus, MemoryRegion *bar, unsigned offset)
 
     /* TODO: init cmask */
     memory_region_init_io(&shpc->mmio, &shpc_mmio_ops, d, "shpc-mmio",
-                          SHPC_SIZEOF(d));
+                          shpc->config_size);
     shpc_cap_update_dword(d);
     memory_region_add_subregion(bar, offset, &shpc->mmio);
     pci_bus_hotplug(sec_bus, shpc_device_hotplug, &d->qdev);
@@ -658,19 +663,24 @@ void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
 static void shpc_save(QEMUFile *f, void *pv, size_t size)
 {
     PCIDevice *d = container_of(pv, PCIDevice, shpc);
-    qemu_put_buffer(f, d->shpc->config, SHPC_SIZEOF(d));
+    qemu_put_buffer(f, d->shpc->config, d->shpc->config_size);
+}
+
+void shpc_post_load(PCIDevice *d)
+{
+    /* Make sure we don't lose notifications. An extra interrupt is harmless. */
+    d->shpc->msi_requested = 0;
+    shpc_interrupt_update(d);
 }
 
 static int shpc_load(QEMUFile *f, void *pv, size_t size)
 {
     PCIDevice *d = container_of(pv, PCIDevice, shpc);
-    int ret = qemu_get_buffer(f, d->shpc->config, SHPC_SIZEOF(d));
-    if (ret != SHPC_SIZEOF(d)) {
+    int ret = qemu_get_buffer(f, d->shpc->config, d->shpc->config_size);
+    if (ret != d->shpc->config_size) {
         return -EINVAL;
     }
-    /* Make sure we don't lose notifications. An extra interrupt is harmless. */
-    d->shpc->msi_requested = 0;
-    shpc_interrupt_update(d);
+    shpc_post_load(d);
     return 0;
 }
 
diff --git a/hw/shpc.h b/hw/shpc.h
index 130b71d..327e4b3 100644
--- a/hw/shpc.h
+++ b/hw/shpc.h
@@ -4,32 +4,36 @@
 #include "qemu-common.h"
 #include "memory.h"
 #include "vmstate.h"
+#include "qidl.h"
 
-struct SHPCDevice {
+QIDL_DECLARE_PUBLIC(SHPCDevice) {
     /* Capability offset in device's config space */
     int cap;
 
     /* # of hot-pluggable slots */
     int nslots;
 
+    /* size of space for SHPC working register set */
+    size_t config_size;
+
     /* SHPC WRS: working register set */
-    uint8_t *config;
+    uint8_t *config q_size(config_size);
 
     /* Used to enable checks on load. Note that writable bits are
      * never checked even if set in cmask. */
-    uint8_t *cmask;
+    uint8_t q_immutable *cmask;
 
     /* Used to implement R/W bytes */
-    uint8_t *wmask;
+    uint8_t q_immutable *wmask;
 
     /* Used to implement RW1C(Write 1 to Clear) bytes */
-    uint8_t *w1cmask;
+    uint8_t q_immutable *w1cmask;
 
     /* MMIO for the SHPC BAR */
     MemoryRegion mmio;
 
     /* Bus controlled by this SHPC */
-    PCIBus *sec_bus;
+    PCIBus q_elsewhere *sec_bus;
 
     /* MSI already requested for this event */
     int msi_requested;
@@ -40,6 +44,7 @@ int shpc_bar_size(PCIDevice *dev);
 int shpc_init(PCIDevice *dev, PCIBus *sec_bus, MemoryRegion *bar, unsigned off);
 void shpc_cleanup(PCIDevice *dev, MemoryRegion *bar);
 void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len);
+void shpc_post_load(PCIDevice *d);
 
 extern VMStateInfo shpc_vmstate_info;
 #define SHPC_VMSTATE(_field, _type) \
-- 
1.7.9.5

[Qemu-devel] [PATCH 20/29] pci_bridge: qidl_declare PCIBridge

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/pci_bridge.c    |    4 ++++
 hw/pci_internals.h |    8 ++++----
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index 4680501..004f67c 100644
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -32,6 +32,10 @@
 #include "pci_bridge.h"
 #include "pci_internals.h"
 #include "range.h"
+#include "qidl.h"
+
+QIDL_ENABLE()
+QIDL_IMPLEMENT_PUBLIC(PCIBridge)
 
 /* PCI bridge subsystem vendor ID helper functions */
 #define PCI_SSVID_SIZEOF        8
diff --git a/hw/pci_internals.h b/hw/pci_internals.h
index bf40dc6..f22db18 100644
--- a/hw/pci_internals.h
+++ b/hw/pci_internals.h
@@ -55,11 +55,11 @@ struct PCIBridgeWindows {
     MemoryRegion alias_io;
 };
 
-struct PCIBridge {
+QIDL_DECLARE_PUBLIC(PCIBridge) {
     PCIDevice dev;
 
     /* private member */
-    PCIBus sec_bus;
+    PCIBus q_elsewhere sec_bus;
     /*
      * Memory regions for the bridge's address spaces.  These regions are not
      * directly added to system_memory/system_io or its descendants.
@@ -71,9 +71,9 @@ struct PCIBridge {
     MemoryRegion address_space_mem;
     MemoryRegion address_space_io;
 
-    PCIBridgeWindows *windows;
+    PCIBridgeWindows q_immutable *windows;
 
-    pci_map_irq_fn map_irq;
+    pci_map_irq_fn q_immutable map_irq;
     const char *bus_name;
 };
 
-- 
1.7.9.5

[Qemu-devel] [PATCH 21/29] pci_bridge_dev: qidl_declare PCIBridgeDev

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/pci_bridge_dev.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/pci_bridge_dev.c b/hw/pci_bridge_dev.c
index f706396..d793857 100644
--- a/hw/pci_bridge_dev.c
+++ b/hw/pci_bridge_dev.c
@@ -26,19 +26,21 @@
 #include "slotid_cap.h"
 #include "memory.h"
 #include "pci_internals.h"
+#include "qidl.h"
 
 #define REDHAT_PCI_VENDOR_ID 0x1b36
 #define PCI_BRIDGE_DEV_VENDOR_ID REDHAT_PCI_VENDOR_ID
 #define PCI_BRIDGE_DEV_DEVICE_ID 0x1
 
-struct PCIBridgeDev {
+typedef struct PCIBridgeDev PCIBridgeDev;
+
+QIDL_DECLARE(PCIBridgeDev) {
     PCIBridge bridge;
     MemoryRegion bar;
     uint8_t chassis_nr;
 #define PCI_BRIDGE_DEV_F_MSI_REQ 0
     uint32_t flags;
 };
-typedef struct PCIBridgeDev PCIBridgeDev;
 
 /* Mapping mandated by PCI-to-PCI Bridge architecture specification,
  * revision 1.2 */
-- 
1.7.9.5

[Qemu-devel] [PATCH 22/29] pci_bridge_dev: add qom property for pci-bridge state

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/pci.c            |    1 +
 hw/pci.h            |    3 ++-
 hw/pci_bridge_dev.c |   29 +++++++++++++++++++++++++++++
 3 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/hw/pci.c b/hw/pci.c
index e0b3f4f..d27659c 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -35,6 +35,7 @@
 #include "msix.h"
 #include "exec-memory.h"
 #include "qidl.h"
+#include "shpc.h"
 
 QIDL_ENABLE()
 
diff --git a/hw/pci.h b/hw/pci.h
index e356fbd..9a08ebc 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -263,7 +263,8 @@ QIDL_DECLARE_PUBLIC(PCIDevice) {
     PCIExpressDevice q_broken exp; /* TODO: qidl, is PCIEAERLog guest-visible? */
 
     /* SHPC */
-    SHPCDevice q_broken *shpc; /* TODO: qidl, needed for pci-bridge support */
+    bool has_shpc;
+    SHPCDevice *shpc q_optional;
 
     /* Location of option rom */
     char q_property("romfile") *romfile;
diff --git a/hw/pci_bridge_dev.c b/hw/pci_bridge_dev.c
index d793857..c89b04f 100644
--- a/hw/pci_bridge_dev.c
+++ b/hw/pci_bridge_dev.c
@@ -28,6 +28,8 @@
 #include "pci_internals.h"
 #include "qidl.h"
 
+QIDL_ENABLE()
+
 #define REDHAT_PCI_VENDOR_ID 0x1b36
 #define PCI_BRIDGE_DEV_VENDOR_ID REDHAT_PCI_VENDOR_ID
 #define PCI_BRIDGE_DEV_DEVICE_ID 0x1
@@ -50,6 +52,28 @@ static int pci_bridge_dev_map_irq_fn(PCIDevice *dev, int irq_num)
     return (irq_num + PCI_SLOT(dev->devfn)) % PCI_NUM_PINS;
 }
 
+static void pci_bridge_dev_get_state(Object *obj, Visitor *v, void *opaque,
+                                     const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PCIBridge *br = DO_UPCAST(PCIBridge, dev, pci);
+    PCIBridgeDev *d = DO_UPCAST(PCIBridgeDev, bridge, br);
+
+    QIDL_VISIT_TYPE(PCIBridgeDev, v, &d, name, errp);
+}
+
+static void pci_bridge_dev_set_state(Object *obj, Visitor *v, void *opaque,
+                                     const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PCIBridge *br = DO_UPCAST(PCIBridge, dev, pci);
+    PCIBridgeDev *d = DO_UPCAST(PCIBridgeDev, bridge, br);
+
+    QIDL_VISIT_TYPE(PCIBridgeDev, v, &d, name, errp);
+    shpc_post_load(pci);
+}
+
+
 static int pci_bridge_dev_initfn(PCIDevice *dev)
 {
     PCIBridge *br = DO_UPCAST(PCIBridge, dev, dev);
@@ -66,6 +90,7 @@ static int pci_bridge_dev_initfn(PCIDevice *dev)
     if (err) {
         goto shpc_error;
     }
+    dev->has_shpc = true;
     err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0);
     if (err) {
         goto slotid_error;
@@ -82,6 +107,10 @@ static int pci_bridge_dev_initfn(PCIDevice *dev)
     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
 		     PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar);
     dev->config[PCI_INTERRUPT_PIN] = 0x1;
+    object_property_add(OBJECT(dev), "state", "PCIBridgeDev",
+                        pci_bridge_dev_get_state, pci_bridge_dev_set_state,
+                        NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(PCIBridgeDev, OBJECT(dev), "state_schema", NULL);
     return 0;
 msi_error:
     slotid_cap_cleanup(dev);
-- 
1.7.9.5

[Qemu-devel] [PATCH 23/29] ide: qidl_declare IDEBus + IDEState + IDEDevice

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/ide/internal.h |   66 +++++++++++++++++++++++++++++------------------------
 1 file changed, 36 insertions(+), 30 deletions(-)

diff --git a/hw/ide/internal.h b/hw/ide/internal.h
index bf7d313..e8e0666 100644
--- a/hw/ide/internal.h
+++ b/hw/ide/internal.h
@@ -13,6 +13,7 @@
 #include "sysemu.h"
 #include "hw/block-common.h"
 #include "hw/scsi-defs.h"
+#include "qidl.h"
 
 /* debug IDE devices */
 //#define DEBUG_IDE
@@ -325,7 +326,9 @@ typedef int DMAFunc(IDEDMA *);
 typedef int DMAIntFunc(IDEDMA *, int);
 typedef void DMARestartFunc(void *, int, RunState);
 
-struct unreported_events {
+typedef struct IDEUnreportedEvents IDEUnreportedEvents;
+
+QIDL_DECLARE_PUBLIC(IDEUnreportedEvents) {
     bool eject_request;
     bool new_media;
 };
@@ -340,19 +343,20 @@ enum ide_dma_cmd {
 	((s)->dma_cmd == IDE_DMA_READ)
 
 /* NOTE: IDEState represents in fact one drive */
-struct IDEState {
-    IDEBus *bus;
+QIDL_DECLARE_PUBLIC(IDEState) {
+    IDEBus q_elsewhere *bus; /* elsewhere via out parent IDEBus */
     uint8_t unit;
     /* ide config */
-    IDEDriveKind drive_kind;
+    IDEDriveKind q_immutable drive_kind;
     int cylinders, heads, sectors, chs_trans;
     int64_t nb_sectors;
     int mult_sectors;
     int identify_set;
-    uint8_t identify_data[512];
+    bool has_identify_data; /* set based on identify_set pre-save */
+    uint8_t q_optional identify_data[512];
     int drive_serial;
-    char drive_serial_str[21];
-    char drive_model_str[41];
+    char q_string drive_serial_str[21];
+    char q_string drive_model_str[41];
     uint64_t wwn;
     /* ide regs */
     uint8_t feature;
@@ -373,10 +377,10 @@ struct IDEState {
 
     /* set for lba48 access */
     uint8_t lba48;
-    BlockDriverState *bs;
-    char version[9];
+    BlockDriverState q_elsewhere *bs;
+    char q_string version[9];
     /* ATAPI specific */
-    struct unreported_events events;
+    IDEUnreportedEvents events;
     uint8_t sense_key;
     uint8_t asc;
     bool tray_open;
@@ -388,40 +392,40 @@ struct IDEState {
     int lba;
     int cd_sector_size;
     int atapi_dma; /* true if dma is requested for the packet cmd */
-    BlockAcctCookie acct;
-    BlockDriverAIOCB *pio_aiocb;
-    struct iovec iov;
-    QEMUIOVector qiov;
+    BlockAcctCookie q_immutable acct;
+    BlockDriverAIOCB q_immutable *pio_aiocb;
+    struct iovec q_derived iov; /* derived from io_buffer/n_sector/req_nb_sectors */
+    QEMUIOVector q_derived qiov; /* derived from iov */
     /* ATA DMA state */
     int io_buffer_offset;
     int io_buffer_size;
-    QEMUSGList sg;
-    /* PIO transfer handling */
-    int req_nb_sectors; /* number of sectors per interrupt */
-    EndTransferFunc *end_transfer_func;
-    uint8_t *data_ptr;
-    uint8_t *data_end;
-    uint8_t *io_buffer;
+    QEMUSGList q_immutable sg;
     /* PIO save/restore */
     int32_t io_buffer_total_len;
     int cur_io_buffer_offset;
     int cur_io_buffer_len;
     uint8_t end_transfer_fn_idx;
+    /* PIO transfer handling */
+    int req_nb_sectors; /* number of sectors per interrupt */
+    EndTransferFunc q_immutable *end_transfer_func;
+    uint8_t q_derived *data_end;
+    uint8_t q_derived *data_ptr;
+    uint8_t q_size(io_buffer_total_len) *io_buffer;
     QEMUTimer *sector_write_timer; /* only used for win2k install hack */
     uint32_t irq_count; /* counts IRQs when using win2k install hack */
     /* CF-ATA extended error */
     uint8_t ext_error;
     /* CF-ATA metadata storage */
     uint32_t mdata_size;
-    uint8_t *mdata_storage;
+    uint8_t q_size(mdata_size) *mdata_storage;
     int media_changed;
-    enum ide_dma_cmd dma_cmd;
+    enum ide_dma_cmd q_immutable dma_cmd;
     /* SMART */
     uint8_t smart_enabled;
     uint8_t smart_autosave;
     int smart_errors;
     uint8_t smart_selftest_count;
-    uint8_t *smart_selftest_data;
+    uint8_t q_size(smart_selftest_count) *smart_selftest_data;
     /* AHCI */
     int ncq_queues;
 };
@@ -445,13 +449,15 @@ struct IDEDMA {
     BlockDriverAIOCB *aiocb;
 };
 
-struct IDEBus {
+QIDL_DECLARE_PUBLIC(IDEBus) {
     BusState qbus;
-    IDEDevice *master;
-    IDEDevice *slave;
+    bool has_master;
+    IDEDevice q_optional *master;
+    bool has_slave;
+    IDEDevice q_optional *slave;
     IDEState ifs[2];
     int bus_id;
-    IDEDMA *dma;
+    IDEDMA q_elsewhere *dma; /* either NOP/immutable, or via PCIIDEState.bmdma */
     uint8_t unit;
     uint8_t cmd;
     qemu_irq irq;
@@ -472,10 +478,10 @@ typedef struct IDEDeviceClass {
     int (*init)(IDEDevice *dev);
 } IDEDeviceClass;
 
-struct IDEDevice {
+QIDL_DECLARE_PUBLIC(IDEDevice) {
     DeviceState qdev;
     uint32_t unit;
-    BlockConf conf;
+    BlockConf q_immutable conf;
     int chs_trans;
     char *version;
     char *serial;
-- 
1.7.9.5

[Qemu-devel] [PATCH 24/29] ide: qidl_declare ISAIDEState

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/ide/isa.c |    7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/hw/ide/isa.c b/hw/ide/isa.c
index 8ab2718..992c553 100644
--- a/hw/ide/isa.c
+++ b/hw/ide/isa.c
@@ -27,20 +27,23 @@
 #include <hw/isa.h>
 #include "block.h"
 #include "dma.h"
+#include "qidl.h"
 
 #include <hw/ide/internal.h>
 
 /***********************************************************/
 /* ISA IDE definitions */
 
-typedef struct ISAIDEState {
+typedef struct ISAIDEState ISAIDEState;
+
+QIDL_DECLARE(ISAIDEState) {
     ISADevice dev;
     IDEBus    bus;
     uint32_t  iobase;
     uint32_t  iobase2;
     uint32_t  isairq;
     qemu_irq  irq;
-} ISAIDEState;
+};
 
 static void isa_ide_reset(DeviceState *d)
 {
-- 
1.7.9.5

[Qemu-devel] [PATCH 25/29] ide: add qom property for isa-ide state

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/ide/core.c     |   12 ++++++++++--
 hw/ide/internal.h |    3 +++
 hw/ide/isa.c      |   32 ++++++++++++++++++++++++++++++++
 hw/ide/qdev.c     |    2 ++
 4 files changed, 47 insertions(+), 2 deletions(-)

diff --git a/hw/ide/core.c b/hw/ide/core.c
index d683a8c..454df35 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -32,9 +32,16 @@
 #include "dma.h"
 #include "hw/block-common.h"
 #include "blockdev.h"
+#include "qidl.h"
 
 #include <hw/ide/internal.h>
 
+QIDL_ENABLE()
+QIDL_IMPLEMENT_PUBLIC(IDEDevice)
+QIDL_IMPLEMENT_PUBLIC(IDEUnreportedEvents)
+QIDL_IMPLEMENT_PUBLIC(IDEState)
+QIDL_IMPLEMENT_PUBLIC(IDEBus)
+
 /* These values were based on a Seagate ST3500418AS but have been modified
    to make more sense in QEMU */
 static const int smart_attributes[][12] = {
@@ -2159,7 +2166,7 @@ static int ide_drive_post_load(void *opaque, int version_id)
     return 0;
 }
 
-static int ide_drive_pio_post_load(void *opaque, int version_id)
+int ide_drive_pio_post_load(void *opaque, int version_id)
 {
     IDEState *s = opaque;
 
@@ -2173,7 +2180,7 @@ static int ide_drive_pio_post_load(void *opaque, int version_id)
     return 0;
 }
 
-static void ide_drive_pio_pre_save(void *opaque)
+void ide_drive_pio_pre_save(void *opaque)
 {
     IDEState *s = opaque;
     int idx;
@@ -2189,6 +2196,7 @@ static void ide_drive_pio_pre_save(void *opaque)
     } else {
         s->end_transfer_fn_idx = idx;
     }
+    s->has_identify_data = s->identify_set;
 }
 
 static bool ide_drive_pio_state_needed(void *opaque)
diff --git a/hw/ide/internal.h b/hw/ide/internal.h
index e8e0666..7958fd3 100644
--- a/hw/ide/internal.h
+++ b/hw/ide/internal.h
@@ -328,6 +328,9 @@ typedef void DMARestartFunc(void *, int, RunState);
 
 typedef struct IDEUnreportedEvents IDEUnreportedEvents;
 
+void ide_drive_pio_pre_save(void *opaque);
+int ide_drive_pio_post_load(void *opaque, int version_id);
+
 QIDL_DECLARE_PUBLIC(IDEUnreportedEvents) {
     bool eject_request;
     bool new_media;
diff --git a/hw/ide/isa.c b/hw/ide/isa.c
index 992c553..8b16f7b 100644
--- a/hw/ide/isa.c
+++ b/hw/ide/isa.c
@@ -31,6 +31,8 @@
 
 #include <hw/ide/internal.h>
 
+QIDL_ENABLE()
+
 /***********************************************************/
 /* ISA IDE definitions */
 
@@ -64,6 +66,32 @@ static const VMStateDescription vmstate_ide_isa = {
     }
 };
 
+static void isa_ide_get_state(Object *obj, Visitor *v, void *opaque,
+                              const char *name, Error **errp)
+{
+    ISADevice *isa = ISA_DEVICE(obj);
+    ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, isa);
+    int i;
+
+    for (i = 0; i < 2; i++) {
+        ide_drive_pio_pre_save(&s->bus.ifs[i]);
+    }
+    QIDL_VISIT_TYPE(ISAIDEState, v, &s, name, errp);
+}
+
+static void isa_ide_set_state(Object *obj, Visitor *v, void *opaque,
+                              const char *name, Error **errp)
+{
+    ISADevice *isa = ISA_DEVICE(obj);
+    ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, isa);
+    int i;
+
+    QIDL_VISIT_TYPE(ISAIDEState, v, &s, name, errp);
+    for (i = 0; i < 2; i++) {
+        ide_drive_pio_post_load(&s->bus.ifs[i], -1);
+    }
+}
+
 static int isa_ide_initfn(ISADevice *dev)
 {
     ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, dev);
@@ -73,6 +101,10 @@ static int isa_ide_initfn(ISADevice *dev)
     isa_init_irq(dev, &s->irq, s->isairq);
     ide_init2(&s->bus, s->irq);
     vmstate_register(&dev->qdev, 0, &vmstate_ide_isa, s);
+    object_property_add(OBJECT(s), "state", "ISAIDEState",
+                        isa_ide_get_state, isa_ide_set_state,
+                        NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(ISAIDEState, OBJECT(s), "state_schema", NULL);
     return 0;
 };
 
diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c
index f2e4ea4..a2b6ea3 100644
--- a/hw/ide/qdev.c
+++ b/hw/ide/qdev.c
@@ -83,6 +83,7 @@ static int ide_qdev_init(DeviceState *qdev)
             goto err;
         }
         bus->master = dev;
+        bus->has_master = true;
         break;
     case 1:
         if (bus->slave) {
@@ -90,6 +91,7 @@ static int ide_qdev_init(DeviceState *qdev)
             goto err;
         }
         bus->slave = dev;
+        bus->has_slave = true;
         break;
     default:
         error_report("Invalid IDE unit %d", dev->unit);
-- 
1.7.9.5

[Qemu-devel] [PATCH 26/29] ide: qidl_declare BMDMAState + PCIIDEState

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/ide/pci.h |   28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/hw/ide/pci.h b/hw/ide/pci.h
index a694e54..b54ea26 100644
--- a/hw/ide/pci.h
+++ b/hw/ide/pci.h
@@ -2,33 +2,36 @@
 #define HW_IDE_PCI_H
 
 #include <hw/ide/internal.h>
+#include "qidl.h"
 
-typedef struct BMDMAState {
-    IDEDMA dma;
+typedef struct BMDMAState BMDMAState;
+
+QIDL_DECLARE_PUBLIC(BMDMAState) {
+    IDEDMA q_immutable dma;
     uint8_t cmd;
     uint8_t status;
     uint32_t addr;
 
-    IDEBus *bus;
+    IDEBus q_elsewhere *bus; /* via parent's corresponding bus */
     /* current transfer state */
     uint32_t cur_addr;
     uint32_t cur_prd_last;
     uint32_t cur_prd_addr;
     uint32_t cur_prd_len;
     uint8_t unit;
-    BlockDriverCompletionFunc *dma_cb;
+    BlockDriverCompletionFunc q_immutable *dma_cb;
     int64_t sector_num;
     uint32_t nsector;
     MemoryRegion addr_ioport;
     MemoryRegion extra_io;
-    QEMUBH *bh;
+    QEMUBH q_immutable *bh;
     qemu_irq irq;
 
     /* Bit 0-2 and 7:   BM status register
      * Bit 3-6:         bus->error_status */
     uint8_t migration_compat_status;
-    struct PCIIDEState *pci_dev;
-} BMDMAState;
+    struct PCIIDEState q_elsewhere *pci_dev; /* via parent */
+};
 
 typedef struct CMD646BAR {
     MemoryRegion cmd;
@@ -37,15 +40,16 @@ typedef struct CMD646BAR {
     struct PCIIDEState *pci_dev;
 } CMD646BAR;
 
-typedef struct PCIIDEState {
+typedef struct PCIIDEState PCIIDEState;
+
+QIDL_DECLARE_PUBLIC(PCIIDEState) {
     PCIDevice dev;
     IDEBus bus[2];
     BMDMAState bmdma[2];
-    uint32_t secondary; /* used only for cmd646 */
+    uint32_t q_immutable secondary; /* used only for cmd646 */
     MemoryRegion bmdma_bar;
-    CMD646BAR cmd646_bar[2]; /* used only for cmd646 */
-} PCIIDEState;
-
+    CMD646BAR q_immutable cmd646_bar[2]; /* used only for cmd646 */
+};
 
 static inline IDEState *bmdma_active_if(BMDMAState *bmdma)
 {
-- 
1.7.9.5

[Qemu-devel] [PATCH 27/29] ide: add qom property for piix3/piix4-ide state

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/ide/pci.c  |    9 +++++++--
 hw/ide/pci.h  |    3 +++
 hw/ide/piix.c |   39 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/hw/ide/pci.c b/hw/ide/pci.c
index bcdd70e..6629b3a 100644
--- a/hw/ide/pci.c
+++ b/hw/ide/pci.c
@@ -28,9 +28,14 @@
 #include <hw/isa.h>
 #include "block.h"
 #include "dma.h"
+#include "qidl.h"
 
 #include <hw/ide/pci.h>
 
+QIDL_ENABLE()
+QIDL_IMPLEMENT_PUBLIC(BMDMAState)
+QIDL_IMPLEMENT_PUBLIC(PCIIDEState)
+
 #define BMDMA_PAGE_SIZE 4096
 
 static void bmdma_start_dma(IDEDMA *dma, IDEState *s,
@@ -380,7 +385,7 @@ static bool ide_bmdma_status_needed(void *opaque)
     return ((bm->status & abused_bits) != 0);
 }
 
-static void ide_bmdma_pre_save(void *opaque)
+void ide_bmdma_pre_save(void *opaque)
 {
     BMDMAState *bm = opaque;
     uint8_t abused_bits = BM_MIGRATION_COMPAT_STATUS_BITS;
@@ -458,7 +463,7 @@ static const VMStateDescription vmstate_bmdma = {
     }
 };
 
-static int ide_pci_post_load(void *opaque, int version_id)
+int ide_pci_post_load(void *opaque, int version_id)
 {
     PCIIDEState *d = opaque;
     int i;
diff --git a/hw/ide/pci.h b/hw/ide/pci.h
index b54ea26..de9545f 100644
--- a/hw/ide/pci.h
+++ b/hw/ide/pci.h
@@ -4,6 +4,9 @@
 #include <hw/ide/internal.h>
 #include "qidl.h"
 
+void ide_bmdma_pre_save(void *opaque);
+int ide_pci_post_load(void *opaque, int version_id);
+
 typedef struct BMDMAState BMDMAState;
 
 QIDL_DECLARE_PUBLIC(BMDMAState) {
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 9431bad..e65b689 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -30,9 +30,12 @@
 #include "blockdev.h"
 #include "sysemu.h"
 #include "dma.h"
+#include "qidl.h"
 
 #include <hw/ide/pci.h>
 
+QIDL_ENABLE()
+
 static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size)
 {
     BMDMAState *bm = opaque;
@@ -147,6 +150,38 @@ static void pci_piix_init_ports(PCIIDEState *d) {
     }
 }
 
+static void pci_piix_ide_get_state(Object *obj, Visitor *v, void *opaque,
+                                   const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PCIIDEState *s = DO_UPCAST(PCIIDEState, dev, pci);
+    int i, j;
+
+    for (i = 0; i < 2; i++) {
+        for (j = 0; j < 2; j++) {
+            ide_drive_pio_pre_save(&s->bus[i].ifs[j]);
+        }
+        ide_bmdma_pre_save(&s->bmdma[i]);
+    }
+    QIDL_VISIT_TYPE(PCIIDEState, v, &s, name, errp);
+}
+
+static void pci_piix_ide_set_state(Object *obj, Visitor *v, void *opaque,
+                                   const char *name, Error **errp)
+{
+    PCIDevice *pci = PCI_DEVICE(obj);
+    PCIIDEState *s = DO_UPCAST(PCIIDEState, dev, pci);
+    int i, j;
+
+    QIDL_VISIT_TYPE(PCIIDEState, v, &s, name, errp);
+    for (i = 0; i < 2; i++) {
+        for (j = 0; j < 2; j++) {
+            ide_drive_pio_post_load(&s->bus[i].ifs[j], -1);
+        }
+    }
+    ide_pci_post_load(s, -1);
+}
+
 static int pci_piix_ide_initfn(PCIDevice *dev)
 {
     PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
@@ -162,6 +197,10 @@ static int pci_piix_ide_initfn(PCIDevice *dev)
     vmstate_register(&d->dev.qdev, 0, &vmstate_ide_pci, d);
 
     pci_piix_init_ports(d);
+    object_property_add(OBJECT(d), "state", "PCIIDEState",
+                        pci_piix_ide_get_state, pci_piix_ide_set_state,
+                        NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(PCIIDEState, OBJECT(d), "state_schema", NULL);
 
     return 0;
 }
-- 
1.7.9.5

[Qemu-devel] [PATCH 28/29] hpet: qidl_declare HPETState + HPETTimer

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/hpet.c |   15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/hw/hpet.c b/hw/hpet.c
index 50ac067..3beb61e 100644
--- a/hw/hpet.c
+++ b/hw/hpet.c
@@ -32,6 +32,7 @@
 #include "sysbus.h"
 #include "mc146818rtc.h"
 #include "i8254.h"
+#include "qidl.h"
 
 //#define HPET_DEBUG
 #ifdef HPET_DEBUG
@@ -42,11 +43,13 @@
 
 #define HPET_MSI_SUPPORT        0
 
-struct HPETState;
-typedef struct HPETTimer {  /* timers */
+typedef struct HPETTimer HPETTimer;
+typedef struct HPETState HPETState;
+
+QIDL_DECLARE(HPETTimer) {  /* timers */
     uint8_t tn;             /*timer number*/
     QEMUTimer *qemu_timer;
-    struct HPETState *state;
+    struct HPETState q_elsewhere *state; /* parent state */
     /* Memory-mapped, software visible timer registers */
     uint64_t config;        /* configuration/cap */
     uint64_t cmp;           /* comparator */
@@ -56,9 +59,9 @@ typedef struct HPETTimer {  /* timers */
     uint8_t wrap_flag;      /* timer pop will indicate wrap for one-shot 32-bit
                              * mode. Next pop will be actual timer expiration.
                              */
-} HPETTimer;
+};
 
-typedef struct HPETState {
+QIDL_DECLARE(HPETState) {
     SysBusDevice busdev;
     MemoryRegion iomem;
     uint64_t hpet_offset;
@@ -75,7 +78,7 @@ typedef struct HPETState {
     uint64_t isr;               /* interrupt status reg */
     uint64_t hpet_counter;      /* main counter */
     uint8_t  hpet_id;           /* instance id */
-} HPETState;
+};
 
 static uint32_t hpet_in_legacy_mode(HPETState *s)
 {
-- 
1.7.9.5

[Qemu-devel] [PATCH 29/29] hpet: add qom property for hpet state

[Michael Roth]

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
---
 hw/hpet.c |   25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/hw/hpet.c b/hw/hpet.c
index 3beb61e..e1b8881 100644
--- a/hw/hpet.c
+++ b/hw/hpet.c
@@ -34,6 +34,8 @@
 #include "i8254.h"
 #include "qidl.h"
 
+QIDL_ENABLE()
+
 //#define HPET_DEBUG
 #ifdef HPET_DEBUG
 #define DPRINTF printf
@@ -682,6 +684,24 @@ static void hpet_handle_legacy_irq(void *opaque, int n, int level)
     }
 }
 
+
+static void hpet_get_state(Object *obj, Visitor *v, void *opaque,
+                           const char *name, Error **errp)
+{
+    HPETState *s = FROM_SYSBUS(HPETState, SYS_BUS_DEVICE(obj));
+    hpet_pre_save(s);
+    QIDL_VISIT_TYPE(HPETState, v, &s, name, errp);
+}
+
+static void hpet_set_state(Object *obj, Visitor *v, void *opaque,
+                           const char *name, Error **errp)
+{
+    HPETState *s = FROM_SYSBUS(HPETState, SYS_BUS_DEVICE(obj));
+    hpet_pre_load(s);
+    QIDL_VISIT_TYPE(HPETState, v, &s, name, errp);
+    hpet_post_load(s, -1);
+}
+
 static int hpet_init(SysBusDevice *dev)
 {
     HPETState *s = FROM_SYSBUS(HPETState, dev);
@@ -727,6 +747,11 @@ static int hpet_init(SysBusDevice *dev)
     /* HPET Area */
     memory_region_init_io(&s->iomem, &hpet_ram_ops, s, "hpet", 0x400);
     sysbus_init_mmio(dev, &s->iomem);
+
+    object_property_add(OBJECT(s), "state", "HPETState",
+                        hpet_get_state, hpet_set_state,
+                        NULL, NULL, NULL);
+    QIDL_SCHEMA_ADD_LINK(HPETState, OBJECT(s), "state_schema", NULL);
     return 0;
 }
 
-- 
1.7.9.5