From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:35913) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TVH8D-0005EF-I1 for qemu-devel@nongnu.org; Mon, 05 Nov 2012 02:30:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TVH8C-0005AU-Gb for qemu-devel@nongnu.org; Mon, 05 Nov 2012 02:30:01 -0500 Received: from hall.aurel32.net ([2001:470:1f15:c4f::1]:49878) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TVH8C-0005AJ-9f for qemu-devel@nongnu.org; Mon, 05 Nov 2012 02:30:00 -0500 From: Aurelien Jarno Date: Mon, 5 Nov 2012 08:29:45 +0100 Message-Id: <1352100585-19415-4-git-send-email-aurelien@aurel32.net> In-Reply-To: <1352100585-19415-1-git-send-email-aurelien@aurel32.net> References: <1352100585-19415-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH v3 for 1.3 3/3] target-openrisc: remove conflicting definitions from cpu.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Jia Liu , Aurelien Jarno , qemu-stable@nongnu.org On an ARM host, the registers definitions from cpu.h clash with /usr/include/sys/ucontext.h. As there are unused, just remove them. Cc: Jia Liu Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Aurelien Jarno --- target-openrisc/cpu.h | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index d42ffb0..ebb5ad3 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -89,24 +89,6 @@ enum { /* Interrupt */ #define NR_IRQS 32 -/* Registers */ -enum { - R0 = 0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, - R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, - R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, - R31 -}; - -/* Register aliases */ -enum { - R_ZERO = R0, - R_SP = R1, - R_FP = R2, - R_LR = R9, - R_RV = R11, - R_RVH = R12 -}; - /* Unit presece register */ enum { UPR_UP = (1 << 0), -- 1.7.10.4