From: Eduardo Habkost <ehabkost@redhat.com>
To: qemu-devel@nongnu.org
Cc: boris.ostrovsky@amd.com, osp@andrep.de,
Anthony Liguori <anthony@codemonkey.ws>
Subject: [Qemu-devel] [PATCH 2/3] target-i386: cpu: add new Opteron CPU model
Date: Wed, 14 Nov 2012 16:28:53 -0200 [thread overview]
Message-ID: <1352917734-13213-3-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1352917734-13213-1-git-send-email-ehabkost@redhat.com>
From: Andre Przywara <osp@andrep.de>
Add a new base CPU model called Opteron_G5 to model the latest
Opteron CPUs. This increases the model value and model numbers and
adds TBM, F16C and FMA over the latest G4 model.
Signed-off-by: Andre Przywara <osp@andrep.de>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
[ehabkost: edited commit message]
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: boris.ostrovsky@amd.com, osp@andrep.de
target-i386/cpu.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index f896e0c..c3aff4f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -756,6 +756,38 @@ static x86_def_t builtin_x86_defs[] = {
.xlevel = 0x8000001A,
.model_id = "AMD Opteron 62xx class CPU",
},
+ {
+ .name = "Opteron_G5",
+ .level = 0xd,
+ .vendor1 = CPUID_VENDOR_AMD_1,
+ .vendor2 = CPUID_VENDOR_AMD_2,
+ .vendor3 = CPUID_VENDOR_AMD_3,
+ .family = 21,
+ .model = 2,
+ .stepping = 0,
+ .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
+ CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
+ CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
+ CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
+ CPUID_DE | CPUID_FP87,
+ .ext_features = CPUID_EXT_F16C | CPUID_EXT_AVX | CPUID_EXT_XSAVE |
+ CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
+ CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_FMA |
+ CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
+ .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
+ CPUID_EXT2_PDPE1GB | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
+ CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
+ CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |
+ CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL | CPUID_EXT2_APIC |
+ CPUID_EXT2_CX8 | CPUID_EXT2_MCE | CPUID_EXT2_PAE | CPUID_EXT2_MSR |
+ CPUID_EXT2_TSC | CPUID_EXT2_PSE | CPUID_EXT2_DE | CPUID_EXT2_FPU,
+ .ext3_features = CPUID_EXT3_TBM | CPUID_EXT3_FMA4 | CPUID_EXT3_XOP |
+ CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE |
+ CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_SVM |
+ CPUID_EXT3_LAHF_LM,
+ .xlevel = 0x8000001A,
+ .model_id = "AMD Opteron 63xx class CPU",
+ },
};
#ifdef CONFIG_KVM
--
1.7.11.7
next prev parent reply other threads:[~2012-11-14 18:28 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-14 18:28 [Qemu-devel] [PATCH 0/3] Opteron_G5 and Haswell CPU models Eduardo Habkost
2012-11-14 18:28 ` [Qemu-devel] [PATCH 1/3] target-i386: cpu: name new CPUID bits Eduardo Habkost
2012-11-15 2:10 ` Igor Mammedov
2012-11-14 18:28 ` Eduardo Habkost [this message]
2012-11-15 2:11 ` [Qemu-devel] [PATCH 2/3] target-i386: cpu: add new Opteron CPU model Igor Mammedov
2012-11-14 18:28 ` [Qemu-devel] [PATCH 3/3] target-i386: add Haswell " Eduardo Habkost
2012-11-15 2:14 ` Igor Mammedov
2012-11-14 20:29 ` [Qemu-devel] [PATCH 0/3] Opteron_G5 and Haswell CPU models Eduardo Habkost
2012-11-15 3:30 ` Andreas Färber
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