From: "Andreas Färber" <afaerber@suse.de>
To: qemu-devel@nongnu.org
Cc: "Boris Ostrovsky" <boris.ostrovsky@amd.com>,
"Andre Przywara" <osp@andrep.de>,
"Eduardo Habkost" <ehabkost@redhat.com>,
anthony@codemonkey.ws, "Andreas Färber" <afaerber@suse.de>
Subject: [Qemu-devel] [PATCH 10/11] target-i386/cpu: Add new Opteron CPU model
Date: Thu, 15 Nov 2012 04:06:46 +0100 [thread overview]
Message-ID: <1352948807-30415-11-git-send-email-afaerber@suse.de> (raw)
In-Reply-To: <1352948807-30415-1-git-send-email-afaerber@suse.de>
From: Andre Przywara <osp@andrep.de>
Add a new base CPU model called Opteron_G5 to model the latest
Opteron CPUs. This increases the model value and model numbers and
adds TBM, F16C and FMA over the latest G4 model.
Signed-off-by: Andre Przywara <osp@andrep.de>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
[ehabkost: edited commit message]
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-i386/cpu.c | 32 ++++++++++++++++++++++++++++++++
1 Datei geändert, 32 Zeilen hinzugefügt(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index f896e0c..c3aff4f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -756,6 +756,38 @@ static x86_def_t builtin_x86_defs[] = {
.xlevel = 0x8000001A,
.model_id = "AMD Opteron 62xx class CPU",
},
+ {
+ .name = "Opteron_G5",
+ .level = 0xd,
+ .vendor1 = CPUID_VENDOR_AMD_1,
+ .vendor2 = CPUID_VENDOR_AMD_2,
+ .vendor3 = CPUID_VENDOR_AMD_3,
+ .family = 21,
+ .model = 2,
+ .stepping = 0,
+ .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
+ CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
+ CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
+ CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
+ CPUID_DE | CPUID_FP87,
+ .ext_features = CPUID_EXT_F16C | CPUID_EXT_AVX | CPUID_EXT_XSAVE |
+ CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
+ CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_FMA |
+ CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
+ .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP |
+ CPUID_EXT2_PDPE1GB | CPUID_EXT2_FXSR | CPUID_EXT2_MMX |
+ CPUID_EXT2_NX | CPUID_EXT2_PSE36 | CPUID_EXT2_PAT |
+ CPUID_EXT2_CMOV | CPUID_EXT2_MCA | CPUID_EXT2_PGE |
+ CPUID_EXT2_MTRR | CPUID_EXT2_SYSCALL | CPUID_EXT2_APIC |
+ CPUID_EXT2_CX8 | CPUID_EXT2_MCE | CPUID_EXT2_PAE | CPUID_EXT2_MSR |
+ CPUID_EXT2_TSC | CPUID_EXT2_PSE | CPUID_EXT2_DE | CPUID_EXT2_FPU,
+ .ext3_features = CPUID_EXT3_TBM | CPUID_EXT3_FMA4 | CPUID_EXT3_XOP |
+ CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE |
+ CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | CPUID_EXT3_SVM |
+ CPUID_EXT3_LAHF_LM,
+ .xlevel = 0x8000001A,
+ .model_id = "AMD Opteron 63xx class CPU",
+ },
};
#ifdef CONFIG_KVM
--
1.7.10.4
next prev parent reply other threads:[~2012-11-15 3:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-15 3:06 [Qemu-devel] [PULL for-1.3] QOM CPUState patch queue 2012-11-15 Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 01/11] qemu-common.h: Comment about usage rules Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 02/11] Move qemu_irq typedef out of qemu-common.h Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 03/11] qdev: Split up header so it can be used in cpu.h Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 04/11] qemu-fsdev-dummy.c: Include module.h Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 05/11] vnc-palette.h: Include <stdbool.h> Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 06/11] qemu-config.h: Include headers it needs Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 07/11] osdep: Move qemu_{open, close}() prototypes Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 08/11] qapi-types.h: Don't include qemu-common.h Andreas Färber
2012-11-15 3:06 ` [Qemu-devel] [PATCH 09/11] target-i386/cpu: Name new CPUID bits Andreas Färber
2012-11-26 15:30 ` Igor Mammedov
2012-11-26 15:44 ` Eduardo Habkost
2012-11-15 3:06 ` Andreas Färber [this message]
2012-11-15 3:06 ` [Qemu-devel] [PATCH 11/11] target-i386: Add Haswell CPU model Andreas Färber
2012-11-21 17:43 ` [Qemu-devel] [PULL for-1.3] QOM CPUState patch queue 2012-11-15 Andreas Färber
2012-11-21 18:58 ` Eduardo Habkost
2012-11-21 19:11 ` Igor Mammedov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1352948807-30415-11-git-send-email-afaerber@suse.de \
--to=afaerber@suse.de \
--cc=anthony@codemonkey.ws \
--cc=boris.ostrovsky@amd.com \
--cc=ehabkost@redhat.com \
--cc=osp@andrep.de \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).