From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:57211) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TZJj3-0004zJ-Ha for qemu-devel@nongnu.org; Fri, 16 Nov 2012 06:04:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TZJj0-0006fE-El for qemu-devel@nongnu.org; Fri, 16 Nov 2012 06:04:45 -0500 Received: from hall.aurel32.net ([2001:470:1f15:c4f::1]:35605) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TZJj0-0006dL-8C for qemu-devel@nongnu.org; Fri, 16 Nov 2012 06:04:42 -0500 From: Aurelien Jarno Date: Fri, 16 Nov 2012 12:04:19 +0100 Message-Id: <1353063863-11446-4-git-send-email-aurelien@aurel32.net> In-Reply-To: <1353063863-11446-1-git-send-email-aurelien@aurel32.net> References: <1353063863-11446-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH 3/7] target-mips: add unions to access DSP elements List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Aurelien Jarno Instead of playing with bit shifting, add two unions (one for 32-bit values, one for 64-bit ones) to access all the DSP elements with the correct type. This make the code easier to read and less error prone, and allow GCC to vectorize the code in some cases. Signed-off-by: Aurelien Jarno --- target-mips/dsp_helper.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index e7949c2..8015d8d 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -20,6 +20,28 @@ #include "cpu.h" #include "helper.h" +/* As the byte ordering doesn't matter, i.e. all columns are treated + identically, these unions can be used directly. */ +typedef union { + uint8_t ub[4]; + int8_t sb[4]; + uint16_t uh[2]; + int16_t sh[2]; + uint32_t uw[1]; + int32_t sw[1]; +} DSP32Value; + +typedef union { + uint8_t ub[8]; + int8_t sb[8]; + uint16_t uh[4]; + int16_t sh[4]; + uint32_t uw[2]; + int32_t sw[2]; + uint64_t ul[1]; + int64_t sl[1]; +} DSP64Value; + /*** MIPS DSP internal functions begin ***/ #define MIPSDSP_ABS(x) (((x) >= 0) ? x : -x) #define MIPSDSP_OVERFLOW(a, b, c, d) (!(!((a ^ b ^ -1) & (a ^ c) & d))) -- 1.7.10.4