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From: Max Filippov <jcmvbkbc@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Igor Mammedov" <imammedo@redhat.com>,
	"Andreas Färber" <afaerber@suse.de>,
	"Max Filippov" <jcmvbkbc@gmail.com>
Subject: [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug
Date: Sun, 18 Nov 2012 00:52:11 +0400	[thread overview]
Message-ID: <1353185531-17042-1-git-send-email-jcmvbkbc@gmail.com> (raw)

cpu_get_phys_page_debug is not in sync with cpu_x86_handle_mmu_fault:
the latter first checks CR0_PG_MASK and only after CR4_PAE_MASK.

This fixes odd gdb code display with PAE enabled.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
 target-i386/helper.c |   37 ++++++++++++++++++++-----------------
 1 files changed, 20 insertions(+), 17 deletions(-)

diff --git a/target-i386/helper.c b/target-i386/helper.c
index bf206cf..7f5e8e3 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -877,7 +877,11 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr)
     uint32_t page_offset;
     int page_size;
 
-    if (env->cr[4] & CR4_PAE_MASK) {
+    if (!(env->cr[0] & CR0_PG_MASK)) {
+        pte = addr;
+        page_size = 4096;
+        pte = pte & env->a20_mask;
+    } else if (env->cr[4] & CR4_PAE_MASK) {
         target_ulong pdpe_addr;
         uint64_t pde, pdpe;
 
@@ -935,26 +939,25 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr)
     } else {
         uint32_t pde;
 
-        if (!(env->cr[0] & CR0_PG_MASK)) {
-            pte = addr;
-            page_size = 4096;
+        /* page directory entry */
+        pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) &
+                env->a20_mask;
+        pde = ldl_phys(pde_addr);
+        if (!(pde & PG_PRESENT_MASK)) {
+            return -1;
+        }
+        if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
+            pte = pde & ~0x003ff000; /* align to 4MB */
+            page_size = 4096 * 1024;
         } else {
             /* page directory entry */
-            pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask;
-            pde = ldl_phys(pde_addr);
-            if (!(pde & PG_PRESENT_MASK))
+            pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) &
+                    env->a20_mask;
+            pte = ldl_phys(pte_addr);
+            if (!(pte & PG_PRESENT_MASK)) {
                 return -1;
-            if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
-                pte = pde & ~0x003ff000; /* align to 4MB */
-                page_size = 4096 * 1024;
-            } else {
-                /* page directory entry */
-                pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask;
-                pte = ldl_phys(pte_addr);
-                if (!(pte & PG_PRESENT_MASK))
-                    return -1;
-                page_size = 4096;
             }
+            page_size = 4096;
         }
         pte = pte & env->a20_mask;
     }
-- 
1.7.7.6

             reply	other threads:[~2012-11-17 20:52 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-11-17 20:52 Max Filippov [this message]
2012-12-04 19:36 ` [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug Max Filippov
2012-12-05 11:15 ` Andreas Färber
2012-12-05 11:36   ` Max Filippov

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