From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:37169) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TZpNM-00033D-9L for qemu-devel@nongnu.org; Sat, 17 Nov 2012 15:52:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TZpNJ-0007FP-7J for qemu-devel@nongnu.org; Sat, 17 Nov 2012 15:52:28 -0500 Received: from mail-la0-f45.google.com ([209.85.215.45]:61790) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TZpNI-0007FB-Uu for qemu-devel@nongnu.org; Sat, 17 Nov 2012 15:52:25 -0500 Received: by mail-la0-f45.google.com with SMTP id p9so1198558laa.4 for ; Sat, 17 Nov 2012 12:52:23 -0800 (PST) From: Max Filippov Date: Sun, 18 Nov 2012 00:52:11 +0400 Message-Id: <1353185531-17042-1-git-send-email-jcmvbkbc@gmail.com> Subject: [Qemu-devel] [PATCH] target-i386: honor CR0_PG_MASK in cpu_get_phys_page_debug List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Max Filippov cpu_get_phys_page_debug is not in sync with cpu_x86_handle_mmu_fault: the latter first checks CR0_PG_MASK and only after CR4_PAE_MASK. This fixes odd gdb code display with PAE enabled. Signed-off-by: Max Filippov --- target-i386/helper.c | 37 ++++++++++++++++++++----------------- 1 files changed, 20 insertions(+), 17 deletions(-) diff --git a/target-i386/helper.c b/target-i386/helper.c index bf206cf..7f5e8e3 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -877,7 +877,11 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr) uint32_t page_offset; int page_size; - if (env->cr[4] & CR4_PAE_MASK) { + if (!(env->cr[0] & CR0_PG_MASK)) { + pte = addr; + page_size = 4096; + pte = pte & env->a20_mask; + } else if (env->cr[4] & CR4_PAE_MASK) { target_ulong pdpe_addr; uint64_t pde, pdpe; @@ -935,26 +939,25 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr) } else { uint32_t pde; - if (!(env->cr[0] & CR0_PG_MASK)) { - pte = addr; - page_size = 4096; + /* page directory entry */ + pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & + env->a20_mask; + pde = ldl_phys(pde_addr); + if (!(pde & PG_PRESENT_MASK)) { + return -1; + } + if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { + pte = pde & ~0x003ff000; /* align to 4MB */ + page_size = 4096 * 1024; } else { /* page directory entry */ - pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask; - pde = ldl_phys(pde_addr); - if (!(pde & PG_PRESENT_MASK)) + pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & + env->a20_mask; + pte = ldl_phys(pte_addr); + if (!(pte & PG_PRESENT_MASK)) { return -1; - if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { - pte = pde & ~0x003ff000; /* align to 4MB */ - page_size = 4096 * 1024; - } else { - /* page directory entry */ - pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask; - pte = ldl_phys(pte_addr); - if (!(pte & PG_PRESENT_MASK)) - return -1; - page_size = 4096; } + page_size = 4096; } pte = pte & env->a20_mask; } -- 1.7.7.6