From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:35122) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TbvUo-0006NM-AF for qemu-devel@nongnu.org; Fri, 23 Nov 2012 10:48:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TbvUb-0006kB-2c for qemu-devel@nongnu.org; Fri, 23 Nov 2012 10:48:50 -0500 Received: from mx1.redhat.com ([209.132.183.28]:61451) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TbvUa-0006jn-RC for qemu-devel@nongnu.org; Fri, 23 Nov 2012 10:48:36 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id qANFmaKv023477 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Fri, 23 Nov 2012 10:48:36 -0500 From: Gerd Hoffmann Date: Fri, 23 Nov 2012 16:48:30 +0100 Message-Id: <1353685711-24573-20-git-send-email-kraxel@redhat.com> In-Reply-To: <1353685711-24573-1-git-send-email-kraxel@redhat.com> References: <1353685711-24573-1-git-send-email-kraxel@redhat.com> Subject: [Qemu-devel] [PATCH 19/20] apci: switch piix4 pci hotplug to memory api List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Gerd Hoffmann Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 37 +++++++++++++++++++++++++++++-------- 1 files changed, 29 insertions(+), 8 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index d74fff9..93aa319 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -42,6 +42,9 @@ #define GPE_BASE 0xafe0 #define GPE_LEN 4 + +#define PCI_HOTPLUG_ADDR 0xae00 +#define PCI_HOTPLUG_SIZE 0x000f #define PCI_UP_BASE 0xae00 #define PCI_DOWN_BASE 0xae04 #define PCI_EJ_BASE 0xae08 @@ -58,6 +61,7 @@ typedef struct PIIX4PMState { PCIDevice dev; MemoryRegion io; MemoryRegion io_gpe; + MemoryRegion io_pci; ACPIREGS ar; APMState apm; @@ -578,6 +582,27 @@ static uint32_t pcirmv_read(void *opaque, uint32_t addr) return s->pci0_hotplug_enable; } +static const MemoryRegionOps piix4_pci_ops = { + .old_portio = (MemoryRegionPortio[]) { + { + .offset = PCI_UP_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4, + .read = pci_up_read, + },{ + .offset = PCI_DOWN_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4, + .read = pci_down_read, + },{ + .offset = PCI_EJ_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4, + .read = pci_features_read, + .write = pciej_write, + },{ + .offset = PCI_RMV_BASE - PCI_HOTPLUG_ADDR, .len = 4, .size = 4, + .read = pcirmv_read, + }, + PORTIO_END_OF_LIST() + }, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, PCIHotplugState state); @@ -587,14 +612,10 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) GPE_LEN); memory_region_add_subregion(get_system_io(), GPE_BASE, &s->io_gpe); - register_ioport_read(PCI_UP_BASE, 4, 4, pci_up_read, s); - register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s); - - register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, s); - register_ioport_read(PCI_EJ_BASE, 4, 4, pci_features_read, s); - - register_ioport_read(PCI_RMV_BASE, 4, 4, pcirmv_read, s); - + memory_region_init_io(&s->io_pci, &piix4_pci_ops, s, "apci-pci-hotplug", + PCI_HOTPLUG_SIZE); + memory_region_add_subregion(get_system_io(), PCI_HOTPLUG_ADDR, + &s->io_pci); pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev); } -- 1.7.1