From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36032) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TdH16-0005lD-AQ for qemu-devel@nongnu.org; Tue, 27 Nov 2012 03:59:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TdH0w-00050x-Hb for qemu-devel@nongnu.org; Tue, 27 Nov 2012 03:59:44 -0500 Received: from mx1.redhat.com ([209.132.183.28]:3900) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TdH0w-00050R-8M for qemu-devel@nongnu.org; Tue, 27 Nov 2012 03:59:34 -0500 From: Gerd Hoffmann Date: Tue, 27 Nov 2012 09:59:23 +0100 Message-Id: <1354006768-13128-14-git-send-email-kraxel@redhat.com> In-Reply-To: <1354006768-13128-1-git-send-email-kraxel@redhat.com> References: <1354006768-13128-1-git-send-email-kraxel@redhat.com> Subject: [Qemu-devel] [PATCH v2 13/18] acpi: fix piix4 smbus mapping List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: afaerber@suse.de, Gerd Hoffmann Make write to the smbus base register and enable bit actually work. Signed-off-by: Gerd Hoffmann --- hw/acpi_piix4.c | 20 +++++++++++++++++++- 1 files changed, 19 insertions(+), 1 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 9e6c97e..b1d5bf3 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -142,12 +142,29 @@ static void pm_io_space_update(PIIX4PMState *s) memory_region_transaction_commit(); } +static void smbus_io_space_update(PIIX4PMState *s) +{ + s->smb_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x90)); + s->smb_io_base &= 0xffc0; + + memory_region_transaction_begin(); + memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & 1); + memory_region_set_address(&s->smb.io, s->smb_io_base); + memory_region_transaction_commit(); +} + static void pm_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { pci_default_write_config(d, address, val, len); - if (range_covers_byte(address, len, 0x80)) + if (range_covers_byte(address, len, 0x80) || + ranges_overlap(address, len, 0x40, 4)) { pm_io_space_update((PIIX4PMState *)d); + } + if (range_covers_byte(address, len, 0xd2) || + ranges_overlap(address, len, 0x90, 4)) { + smbus_io_space_update((PIIX4PMState *)d); + } } static void vmstate_pci_status_pre_save(void *opaque) @@ -392,6 +409,7 @@ static int piix4_pm_initfn(PCIDevice *dev) pci_conf[0x91] = s->smb_io_base >> 8; pci_conf[0xd2] = 0x09; pm_smbus_init(&s->dev.qdev, &s->smb); + memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1); memory_region_add_subregion(get_system_io(), s->smb_io_base, &s->smb.io); memory_region_init(&s->io, "piix4-pm", 64); -- 1.7.1