From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:50133) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfeIp-0007sX-5K for qemu-devel@nongnu.org; Mon, 03 Dec 2012 17:15:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TfeIk-00038B-RF for qemu-devel@nongnu.org; Mon, 03 Dec 2012 17:15:50 -0500 Sender: fluxion From: Michael Roth Date: Mon, 3 Dec 2012 16:08:45 -0600 Message-Id: <1354572547-21271-22-git-send-email-mdroth@linux.vnet.ibm.com> In-Reply-To: <1354572547-21271-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1354572547-21271-1-git-send-email-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH 21/43] target-mips: fix wrong microMIPS opcode encoding List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-stable@nongnu.org Cc: aliguori@us.ibm.com, qemu-devel@nongnu.org From: "陳韋任 (Wei-Ren Chen)" While reading microMIPS decoding, I found a possible wrong opcode encoding. According to [1] page 166, the bits 13..12 for MULTU is 0x01 rather than 0x00. Please review, thanks. [1] MIPS Architecture for Programmers VolumeIV-e: The MIPS DSP Application-Specific Extension to the microMIPS32 Architecture Signed-off-by: Chen Wei-Ren Signed-off-by: Aurelien Jarno (cherry picked from commit 6801038bc52d61f81ac8a25fbe392f1bad982887) Signed-off-by: Michael Roth --- target-mips/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 4e04e97..49907bb 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -9486,7 +9486,7 @@ enum { /* bits 13..12 for 0x32 */ MULT_ACC = 0x0, - MULTU_ACC = 0x0, + MULTU_ACC = 0x1, /* bits 15..12 for 0x2c */ SEB = 0x2, -- 1.7.9.5