From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:60557) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tg5SZ-0006JP-9n for qemu-devel@nongnu.org; Tue, 04 Dec 2012 22:15:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tg5SX-00021h-RX for qemu-devel@nongnu.org; Tue, 04 Dec 2012 22:15:42 -0500 Received: from mail-la0-f45.google.com ([209.85.215.45]:39861) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tg5SX-00021d-K0 for qemu-devel@nongnu.org; Tue, 04 Dec 2012 22:15:41 -0500 Received: by mail-la0-f45.google.com with SMTP id p9so3416568laa.4 for ; Tue, 04 Dec 2012 19:15:40 -0800 (PST) From: Max Filippov Date: Wed, 5 Dec 2012 07:15:19 +0400 Message-Id: <1354677327-22552-1-git-send-email-jcmvbkbc@gmail.com> Subject: [Qemu-devel] [PATCH 0/8] xtensa patch queue List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl , Max Filippov Hi. This is my current patch queue for xtensa: - add support for a number of Special Registers: ATOMCTL, CACHEATTR, MISC; - raise exceptions on access to unconfigured SRs/invalid access to configured SRs; - add unit tests for SR access and for s32c1i opcode; - use movcond to re-implement some opcodes more efficiently. Please review/apply. Max Filippov (8): target-xtensa: implement ATOMCTL SR target-xtensa: implement CACHEATTR SR target-xtensa: restrict available SRs by enabled options target-xtensa: better control rsr/wsr/xsr access to SRs target-xtensa: implement MISC SR target-xtensa: add SR accessibility unit tests target-xtensa: add s32c1i unit tests target-xtensa: use movcond where possible target-xtensa/cpu.c | 3 + target-xtensa/cpu.h | 14 ++ target-xtensa/helper.c | 75 +++++++-- target-xtensa/helper.h | 1 + target-xtensa/op_helper.c | 57 ++++++ target-xtensa/overlay_tool.h | 12 ++- target-xtensa/translate.c | 367 ++++++++++++++++++++++------------------ tests/tcg/xtensa/Makefile | 2 + tests/tcg/xtensa/macros.inc | 2 +- tests/tcg/xtensa/test_s32c1i.S | 39 +++++ tests/tcg/xtensa/test_sr.S | 90 ++++++++++ 11 files changed, 484 insertions(+), 178 deletions(-) create mode 100644 tests/tcg/xtensa/test_s32c1i.S create mode 100644 tests/tcg/xtensa/test_sr.S -- 1.7.7.6