From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34364) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ThVsg-0004D7-9Y for qemu-devel@nongnu.org; Sat, 08 Dec 2012 20:40:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ThVsf-0003YT-1u for qemu-devel@nongnu.org; Sat, 08 Dec 2012 20:40:34 -0500 Received: from cantor2.suse.de ([195.135.220.15]:55595 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ThVse-0003YL-Oa for qemu-devel@nongnu.org; Sat, 08 Dec 2012 20:40:32 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 9 Dec 2012 02:40:16 +0100 Message-Id: <1355017216-22962-6-git-send-email-afaerber@suse.de> In-Reply-To: <1355017216-22962-1-git-send-email-afaerber@suse.de> References: <1355017216-22962-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-cpu v2 5/5] target-alpha: Add support for -cpu ? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , rth@twiddle.net Implement alphabetical listing of CPU subclasses. Signed-off-by: Andreas F=C3=A4rber --- target-alpha/cpu.c | 41 +++++++++++++++++++++++++++++++++++++++++ target-alpha/cpu.h | 2 ++ 2 Dateien ge=C3=A4ndert, 43 Zeilen hinzugef=C3=BCgt(+) diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 11df753..d065085 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -33,6 +33,47 @@ static void alpha_cpu_realize(Object *obj, Error **err= ) #endif } =20 +typedef struct AlphaCPUListState { + fprintf_function cpu_fprintf; + FILE *file; +} AlphaCPUListState; + +/* Sort alphabetically by type name. */ +static gint alpha_cpu_list_compare(gconstpointer a, gconstpointer b) +{ + ObjectClass *class_a =3D (ObjectClass *)a; + ObjectClass *class_b =3D (ObjectClass *)b; + const char *name_a, *name_b; + + name_a =3D object_class_get_name(class_a); + name_b =3D object_class_get_name(class_b); + return strcmp(name_a, name_b); +} + +static void alpha_cpu_list_entry(gpointer data, gpointer user_data) +{ + ObjectClass *oc =3D data; + AlphaCPUListState *s =3D user_data; + + (*s->cpu_fprintf)(s->file, " %s\n", + object_class_get_name(oc)); +} + +void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf) +{ + AlphaCPUListState s =3D { + .file =3D f, + .cpu_fprintf =3D cpu_fprintf, + }; + GSList *list; + + list =3D object_class_get_list(TYPE_ALPHA_CPU, false); + list =3D g_slist_sort(list, alpha_cpu_list_compare); + (*cpu_fprintf)(f, "Available CPUs:\n"); + g_slist_foreach(list, alpha_cpu_list_entry, &s); + g_slist_free(list); +} + /* Models */ =20 #define TYPE(model) model "-" TYPE_ALPHA_CPU diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index a5eb449..867ee32 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -296,6 +296,7 @@ struct CPUAlphaState { int implver; }; =20 +#define cpu_list alpha_cpu_list #define cpu_exec cpu_alpha_exec #define cpu_gen_code cpu_alpha_gen_code #define cpu_signal_handler cpu_alpha_signal_handler @@ -445,6 +446,7 @@ static inline CPUAlphaState *cpu_init(const char *cpu= _model) return &cpu->env; } =20 +void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf); int cpu_alpha_exec(CPUAlphaState *s); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero --=20 1.7.10.4