From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([208.118.235.92]:37833)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <B07421@freescale.com>) id 1TiDC1-0004kR-TU
	for qemu-devel@nongnu.org; Mon, 10 Dec 2012 18:55:28 -0500
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <B07421@freescale.com>) id 1TiDBz-0006xu-A4
	for qemu-devel@nongnu.org; Mon, 10 Dec 2012 18:55:25 -0500
Date: Mon, 10 Dec 2012 17:40:00 -0600
From: Scott Wood <scottwood@freescale.com>
References: <1354974282-1915-1-git-send-email-agraf@suse.de>
	<1354974282-1915-3-git-send-email-agraf@suse.de>
	<1355182459.5334.17@snotra>
In-Reply-To: <1355182459.5334.17@snotra> (from scottwood@freescale.com on
	Mon Dec 10 17:34:19 2012)
Message-ID: <1355182800.5334.18@snotra>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; delsp=Yes; format=Flowed
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 02/19] mpic: Unify numbering
	scheme
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Scott Wood <scottwood@freescale.com>
Cc: "qemu-ppc@nongnu.org List" <qemu-ppc@nongnu.org>, Alexander Graf <agraf@suse.de>, qemu-devel qemu-devel <qemu-devel@nongnu.org>

On 12/10/2012 05:34:19 PM, Scott Wood wrote:
> On 12/08/2012 07:44:25 AM, Alexander Graf wrote:
>>  /* Interrupt definitions */
>> -#define MPIC_EXT_IRQ      0
>> -#define MPIC_INT_IRQ      (MPIC_EXT_IRQ + MPIC_MAX_EXT)
>> -#define MPIC_TMR_IRQ      (MPIC_INT_IRQ + MPIC_MAX_INT)
>> -#define MPIC_MSG_IRQ      (MPIC_TMR_IRQ + MPIC_MAX_TMR)
>> -#define MPIC_MSI_IRQ      (MPIC_MSG_IRQ + MPIC_MAX_MSG)
>> -#define MPIC_IPI_IRQ      (MPIC_MSI_IRQ + MPIC_MAX_MSI)
>> +/* IRQs, accessible through the IRQ region */
>> +#define MPIC_EXT_IRQ      0x00
>> +#define MPIC_INT_IRQ      0x10
>> +#define MPIC_MSG_IRQ      0xb0
>> +#define MPIC_MSI_IRQ      0xe0
>=20
> Where are MPIC_EXT/INT/MSG/MSI_IRQ used now?  Note that these are
> specific to Freescale's MPIC.
>=20
>> +/* These are available through separate regions, but
>> +   for simplicity's sake mapped into the same number space */
>> +#define MPIC_TMR_IRQ      0xf3
>> +#define MPIC_IPI_IRQ      0xfb
>=20
> Please don't do this, or at least choose different numbers.  0xf3 is a
> valid MSI on p4080 (not to mention T4240 which goes beyond 256).
>=20
> Again, what uses these defines?  Is it something later in the series?

OK, the TMR/IPI are used by existing code that this patch doesn't =20
remove, but I think that's not the case with EXT/INT/MSG/MSI.

-Scott=