[Qemu-devel] [PATCH 2/2] softfloat: Implement uint64_to_float128

[Richard Henderson <rth@twiddle.net>]

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 fpu/softfloat.c | 8 ++++++++
 fpu/softfloat.h | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 0daad0d..506defb 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1339,6 +1339,14 @@ float128 int64_to_float128( int64 a STATUS_PARAM )
 
 }
 
+float128 uint64_to_float128(uint64 a STATUS_PARAM)
+{
+    if (a == 0) {
+        return float128_zero;
+    }
+    return normalizeRoundAndPackFloat128(0, 0x406E, a, 0 STATUS_VAR);
+}
+
 /*----------------------------------------------------------------------------
 | Returns the result of converting the single-precision floating-point value
 | `a' to the 32-bit two's complement integer format.  The conversion is
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index d8999b3..48cdb7d 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -237,6 +237,7 @@ float64 int64_to_float64( int64 STATUS_PARAM );
 float64 uint64_to_float64( uint64 STATUS_PARAM );
 floatx80 int64_to_floatx80( int64 STATUS_PARAM );
 float128 int64_to_float128( int64 STATUS_PARAM );
+float128 uint64_to_float128(uint64 STATUS_PARAM);
 
 /*----------------------------------------------------------------------------
 | Software half-precision conversion routines.
@@ -630,6 +631,8 @@ INLINE int float128_is_any_nan(float128 a)
         ((a.low != 0) || ((a.high & 0xffffffffffffLL) != 0));
 }
 
+#define float128_zero make_float128(0, 0)
+
 /*----------------------------------------------------------------------------
 | The pattern for a default generated quadruple-precision NaN.
 *----------------------------------------------------------------------------*/
-- 
1.7.11.7