From: "Andreas Färber" <andreas.faerber@web.de>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Blue Swirl" <blauwirbel@gmail.com>,
"Alex Horn" <alex.horn@cs.ox.ac.uk>,
"Andreas Färber" <andreas.faerber@web.de>,
"Anthony Liguori" <anthony@codemonkey.ws>
Subject: [Qemu-devel] [PATCH 1/2] omap_i2c: Clear SBD bit in STAT register on DATA read
Date: Wed, 12 Dec 2012 07:29:32 +0100 [thread overview]
Message-ID: <1355293773-18361-2-git-send-email-andreas.faerber@web.de> (raw)
In-Reply-To: <1355293773-18361-1-git-send-email-andreas.faerber@web.de>
After reading a single-byte I2C response such as the tmp105's response
to 0x01 0x00, the SBD status bit would not get reset on next read, still
indicating validity of only a single byte. Clear it on next word read.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
---
hw/omap_i2c.c | 1 +
1 Datei geändert, 1 Zeile hinzugefügt(+)
diff --git a/hw/omap_i2c.c b/hw/omap_i2c.c
index ba08e64..308c088 100644
--- a/hw/omap_i2c.c
+++ b/hw/omap_i2c.c
@@ -196,6 +196,7 @@ static uint32_t omap_i2c_read(void *opaque, hwaddr addr)
s->stat |= 1 << 15; /* SBD */
s->rxlen = 0;
} else if (s->rxlen > 1) {
+ s->stat &= ~(1 << 15); /* SBD */
if (s->rxlen > 2)
s->fifo >>= 16;
s->rxlen -= 2;
--
1.7.10.4
next prev parent reply other threads:[~2012-12-12 6:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-12 6:29 [Qemu-devel] [PATCH 0/2] tmp105: qtest support Andreas Färber
2012-12-12 6:29 ` Andreas Färber [this message]
2012-12-13 14:45 ` [Qemu-devel] [PATCH 1/2] omap_i2c: Clear SBD bit in STAT register on DATA read Peter Maydell
2012-12-13 17:04 ` Andreas Färber
2012-12-13 17:10 ` Peter Maydell
2012-12-12 6:29 ` [Qemu-devel] [PATCH 2/2] tests: Add tmp105 unit test Andreas Färber
2012-12-12 14:44 ` Alex Horn
2012-12-15 17:44 ` Andreas Färber
2012-12-12 19:43 ` Blue Swirl
2012-12-12 23:17 ` Andreas Färber
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