From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58826) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TlLcR-0005m7-M4 for qemu-devel@nongnu.org; Wed, 19 Dec 2012 10:31:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TlLcL-0000dg-34 for qemu-devel@nongnu.org; Wed, 19 Dec 2012 10:31:39 -0500 Received: from cantor2.suse.de ([195.135.220.15]:36775 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TlLcK-0000dO-Ov for qemu-devel@nongnu.org; Wed, 19 Dec 2012 10:31:32 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 19 Dec 2012 16:31:11 +0100 Message-Id: <1355931071-22100-8-git-send-email-afaerber@suse.de> In-Reply-To: <1355931071-22100-1-git-send-email-afaerber@suse.de> References: <1355931071-22100-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-cpu 7/7] exec: Return CPUState from qemu_get_cpu() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno Move the declaration to qemu/cpu.h and add documentation. The implementation still depends on CPUArchState for CPU iteration. Signed-off-by: Andreas F=C3=A4rber --- cpu-all.h | 1 - exec.c | 6 +++--- hw/pxa2xx_gpio.c | 2 +- include/qemu/cpu.h | 10 ++++++++++ target-mips/op_helper.c | 11 ++++++++--- 5 Dateien ge=C3=A4ndert, 22 Zeilen hinzugef=C3=BCgt(+), 8 Zeilen entfern= t(-) diff --git a/cpu-all.h b/cpu-all.h index d6b2b19..2d3b49c 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -353,7 +353,6 @@ int page_check_range(target_ulong start, target_ulong= len, int flags); #endif =20 CPUArchState *cpu_copy(CPUArchState *env); -CPUArchState *qemu_get_cpu(int cpu); =20 #define CPU_DUMP_CODE 0x00010000 #define CPU_DUMP_FPU 0x00020000 /* dump FPU register state, not just int= eger */ diff --git a/exec.c b/exec.c index b364a33..4627a11 100644 --- a/exec.c +++ b/exec.c @@ -244,10 +244,10 @@ static const VMStateDescription vmstate_cpu_common = =3D { }; #endif =20 -CPUArchState *qemu_get_cpu(int index) +CPUState *qemu_get_cpu(int index) { CPUArchState *env =3D first_cpu; - CPUState *cpu; + CPUState *cpu =3D NULL; =20 while (env) { cpu =3D ENV_GET_CPU(env); @@ -257,7 +257,7 @@ CPUArchState *qemu_get_cpu(int index) env =3D env->next_cpu; } =20 - return env; + return cpu; } =20 void cpu_exec_init(CPUArchState *env) diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c index b9f2d52..baabffb 100644 --- a/hw/pxa2xx_gpio.c +++ b/hw/pxa2xx_gpio.c @@ -277,7 +277,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev) =20 s =3D FROM_SYSBUS(PXA2xxGPIOInfo, dev); =20 - s->cpu =3D arm_env_get_cpu(qemu_get_cpu(s->ncpu)); + s->cpu =3D ARM_CPU(qemu_get_cpu(s->ncpu)); =20 qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines); qdev_init_gpio_out(&dev->qdev, s->handler, s->lines); diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h index 0fee271..9fdee44 100644 --- a/include/qemu/cpu.h +++ b/include/qemu/cpu.h @@ -156,5 +156,15 @@ bool cpu_is_stopped(CPUState *cpu); */ void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data); =20 +/** + * qemu_get_cpu: + * @index: The CPUState@cpu_index value of the CPU to obtain. + * + * Gets a CPU matching @index. + * + * Returns: The CPU or %NULL if there is no matching CPU. + */ +CPUState *qemu_get_cpu(int index); + =20 #endif diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 83998ab..18420fb 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -586,8 +586,9 @@ static inline void mips_tc_sleep(MIPSCPU *cpu, int tc= ) walking the list of CPUMIPSStates. */ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc) { + MIPSCPU *cpu; CPUState *cs; - CPUMIPSState *other; + CPUState *other_cs; int vpe_idx; int tc_idx =3D *tc; =20 @@ -600,8 +601,12 @@ static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *e= nv, int *tc) cs =3D CPU(mips_env_get_cpu(env)); vpe_idx =3D tc_idx / cs->nr_threads; *tc =3D tc_idx % cs->nr_threads; - other =3D qemu_get_cpu(vpe_idx); - return other ? other : env; + other_cs =3D qemu_get_cpu(vpe_idx); + if (other_cs =3D=3D NULL) { + return env; + } + cpu =3D MIPS_CPU(other_cs); + return &cpu->env; } =20 /* The per VPE CP0_Status register shares some fields with the per TC --=20 1.7.10.4