From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44580) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TpjnV-0002Eq-M5 for qemu-devel@nongnu.org; Mon, 31 Dec 2012 13:09:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TpjnQ-0003si-K3 for qemu-devel@nongnu.org; Mon, 31 Dec 2012 13:09:13 -0500 Received: from mail-ia0-f182.google.com ([209.85.210.182]:39050) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TpjnQ-0003sU-Fg for qemu-devel@nongnu.org; Mon, 31 Dec 2012 13:09:08 -0500 Received: by mail-ia0-f182.google.com with SMTP id x2so10652743iad.41 for ; Mon, 31 Dec 2012 10:09:08 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Mon, 31 Dec 2012 10:09:04 -0800 Message-Id: <1356977344-3679-3-git-send-email-rth@twiddle.net> In-Reply-To: <1356977344-3679-1-git-send-email-rth@twiddle.net> References: <1356977344-3679-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 2/2] softfloat: Implement uint64_to_float128 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- fpu/softfloat.c | 8 ++++++++ include/fpu/softfloat.h | 3 +++ 2 files changed, 11 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 20b05d4..ac3d150 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1339,6 +1339,14 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) } +float128 uint64_to_float128(uint64 a STATUS_PARAM) +{ + if (a == 0) { + return float128_zero; + } + return normalizeRoundAndPackFloat128(0, 0x406E, a, 0 STATUS_VAR); +} + /*---------------------------------------------------------------------------- | Returns the result of converting the single-precision floating-point value | `a' to the 32-bit two's complement integer format. The conversion is diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 0946f07..f3927e2 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -237,6 +237,7 @@ float64 int64_to_float64( int64 STATUS_PARAM ); float64 uint64_to_float64( uint64 STATUS_PARAM ); floatx80 int64_to_floatx80( int64 STATUS_PARAM ); float128 int64_to_float128( int64 STATUS_PARAM ); +float128 uint64_to_float128( uint64 STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software half-precision conversion routines. @@ -630,6 +631,8 @@ INLINE int float128_is_any_nan(float128 a) ((a.low != 0) || ((a.high & 0xffffffffffffLL) != 0)); } +#define float128_zero make_float128(0, 0) + /*---------------------------------------------------------------------------- | The pattern for a default generated quadruple-precision NaN. *----------------------------------------------------------------------------*/ -- 1.7.11.7