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From: Alexander Graf <agraf@suse.de>
To: qemu-devel@nongnu.org
Cc: Scott Wood <scottwood@freescale.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [PATCH ppc-next 1/3] openpic: move gcr write into a function
Date: Mon,  7 Jan 2013 20:21:37 +0100	[thread overview]
Message-ID: <1357586499-11463-2-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1357586499-11463-1-git-send-email-agraf@suse.de>

The GCR register contains too much functionality to be covered inside
of the register switch statement. Move it out into a separate function.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/openpic.c |   39 ++++++++++++++++++++++-----------------
 1 files changed, 22 insertions(+), 17 deletions(-)

diff --git a/hw/openpic.c b/hw/openpic.c
index 3b20a39..344f97f 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -641,6 +641,27 @@ static inline void write_IRQreg_ivpr(OpenPICState *opp, int n_IRQ, uint32_t val)
             opp->src[n_IRQ].ivpr);
 }
 
+static void openpic_gcr_write(OpenPICState *opp, uint64_t val)
+{
+    if (val & GCR_RESET) {
+        openpic_reset(&opp->busdev.qdev);
+    } else if (opp->mpic_mode_mask) {
+        CPUArchState *env;
+        int mpic_proxy = 0;
+
+        opp->gcr &= ~opp->mpic_mode_mask;
+        opp->gcr |= val & opp->mpic_mode_mask;
+
+        /* Set external proxy mode */
+        if ((val & opp->mpic_mode_mask) == GCR_MODE_PROXY) {
+            mpic_proxy = 1;
+        }
+        for (env = first_cpu; env != NULL; env = env->next_cpu) {
+            env->mpic_proxy = mpic_proxy;
+        }
+    }
+}
+
 static void openpic_gbl_write(void *opaque, hwaddr addr, uint64_t val,
                               unsigned len)
 {
@@ -669,23 +690,7 @@ static void openpic_gbl_write(void *opaque, hwaddr addr, uint64_t val,
     case 0x1000: /* FRR */
         break;
     case 0x1020: /* GCR */
-        if (val & GCR_RESET) {
-            openpic_reset(&opp->busdev.qdev);
-        } else if (opp->mpic_mode_mask) {
-            CPUArchState *env;
-            int mpic_proxy = 0;
-
-            opp->gcr &= ~opp->mpic_mode_mask;
-            opp->gcr |= val & opp->mpic_mode_mask;
-
-            /* Set external proxy mode */
-            if ((val & opp->mpic_mode_mask) == GCR_MODE_PROXY) {
-                mpic_proxy = 1;
-            }
-            for (env = first_cpu; env != NULL; env = env->next_cpu) {
-                env->mpic_proxy = mpic_proxy;
-            }
-        }
+        openpic_gcr_write(opp, val);
         break;
     case 0x1080: /* VIR */
         break;
-- 
1.6.0.2

  reply	other threads:[~2013-01-07 19:21 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-07 19:21 [Qemu-devel] [PATCH ppc-next 0/3] openpic: improve GCR register handling Alexander Graf
2013-01-07 19:21 ` Alexander Graf [this message]
2013-01-07 19:21 ` [Qemu-devel] [PATCH ppc-next 2/3] openpic: unify gcr mode mask updates Alexander Graf
2013-01-07 19:21 ` [Qemu-devel] [PATCH ppc-next 3/3] openpic: set mixed mode as supported Alexander Graf

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