From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59276) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TsgEJ-0000UX-EA for qemu-devel@nongnu.org; Tue, 08 Jan 2013 15:57:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TsgEI-0005BB-56 for qemu-devel@nongnu.org; Tue, 08 Jan 2013 15:57:03 -0500 Received: from cantor2.suse.de ([195.135.220.15]:45653 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TsgEH-0005B6-SX for qemu-devel@nongnu.org; Tue, 08 Jan 2013 15:57:02 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Tue, 8 Jan 2013 21:56:34 +0100 Message-Id: <1357678594-427-18-git-send-email-afaerber@suse.de> In-Reply-To: <1357678594-427-1-git-send-email-afaerber@suse.de> References: <1357678594-427-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 17/17] target-i386: Explicitly set vendor for each built-in cpudef List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= From: Igor Mammedov Since cpudef config is not supported anymore and all remaining sources now always set x86_def_t.vendor[123] fields, remove setting default vendor to simplify future re-factoring. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Signed-off-by: Andreas F=C3=A4rber --- target-i386/cpu.c | 40 +++++++++++++++++++++++++++++++--------- 1 Datei ge=C3=A4ndert, 31 Zeilen hinzugef=C3=BCgt(+), 9 Zeilen entfernt(= -) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index b40cc37..78bd61e 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -407,6 +407,9 @@ static x86_def_t builtin_x86_defs[] =3D { { .name =3D "core2duo", .level =3D 10, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 6, .model =3D 15, .stepping =3D 11, @@ -451,6 +454,9 @@ static x86_def_t builtin_x86_defs[] =3D { { .name =3D "qemu32", .level =3D 4, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 6, .model =3D 3, .stepping =3D 3, @@ -461,6 +467,9 @@ static x86_def_t builtin_x86_defs[] =3D { { .name =3D "kvm32", .level =3D 5, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 15, .model =3D 6, .stepping =3D 1, @@ -475,6 +484,9 @@ static x86_def_t builtin_x86_defs[] =3D { { .name =3D "coreduo", .level =3D 10, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 6, .model =3D 14, .stepping =3D 8, @@ -490,6 +502,9 @@ static x86_def_t builtin_x86_defs[] =3D { { .name =3D "486", .level =3D 1, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 4, .model =3D 0, .stepping =3D 0, @@ -499,6 +514,9 @@ static x86_def_t builtin_x86_defs[] =3D { { .name =3D "pentium", .level =3D 1, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 5, .model =3D 4, .stepping =3D 3, @@ -508,6 +526,9 @@ static x86_def_t builtin_x86_defs[] =3D { { .name =3D "pentium2", .level =3D 2, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 6, .model =3D 5, .stepping =3D 2, @@ -517,6 +538,9 @@ static x86_def_t builtin_x86_defs[] =3D { { .name =3D "pentium3", .level =3D 2, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 6, .model =3D 7, .stepping =3D 3, @@ -542,6 +566,9 @@ static x86_def_t builtin_x86_defs[] =3D { .name =3D "n270", /* original is on level 10 */ .level =3D 5, + .vendor1 =3D CPUID_VENDOR_INTEL_1, + .vendor2 =3D CPUID_VENDOR_INTEL_2, + .vendor3 =3D CPUID_VENDOR_INTEL_3, .family =3D 6, .model =3D 28, .stepping =3D 2, @@ -1534,15 +1561,10 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu= _model) if (cpu_x86_parse_featurestr(def, features) < 0) { goto error; } - if (def->vendor1) { - env->cpuid_vendor1 =3D def->vendor1; - env->cpuid_vendor2 =3D def->vendor2; - env->cpuid_vendor3 =3D def->vendor3; - } else { - env->cpuid_vendor1 =3D CPUID_VENDOR_INTEL_1; - env->cpuid_vendor2 =3D CPUID_VENDOR_INTEL_2; - env->cpuid_vendor3 =3D CPUID_VENDOR_INTEL_3; - } + assert(def->vendor1); + env->cpuid_vendor1 =3D def->vendor1; + env->cpuid_vendor2 =3D def->vendor2; + env->cpuid_vendor3 =3D def->vendor3; env->cpuid_vendor_override =3D def->vendor_override; object_property_set_int(OBJECT(cpu), def->level, "level", &error); object_property_set_int(OBJECT(cpu), def->family, "family", &error); --=20 1.7.10.4