[Qemu-devel] [RFC qom-cpu 00/15] CPUState QOM realizefn support

[Qemu-devel] [RFC qom-cpu 00/15] CPUState QOM realizefn support

[Andreas Färber]

Hello,

This series is one of the missing puzzle pieces to allow using device_add
for CPU hotplug mentioned on yesterdays's KVM call.

Historically, CPUs are created through cpu_init() macro aliased to
cpu_<arch>_init() functions. Since v1.1 these all create a QOM object and
then somehow "fiddle" with it as before.
QOM realize allows us to make some of this code accessible to DeviceClass
so that the existing device infrastructure can invoke it. Most importantly
this is needed to actually initialize the TCG thread / KVM vCPU. :)

I do not consider this Soft Freeze material and would like to queue this
on my qom-cpu-next branch for v1.5. Only partially tested so far.

alpha and unicore32 are still lacking a CPUClass::reset implementation.
Once all are implemented, the cpu_reset() call would be moved to qom/cpu.c,
and all target CPU realizefns would need to call the base type's realizefn,
as done for CPUClass::reset today.

As next step I intend to pull the realized = true bit out of cpu_init(),
with *-user setting realized = true after cpu_init() and vl.c iterating
over the CPUs in the final central location, before machine reset.

Regards,
Andreas

Changes from sh4 subclasses series:
* Adopted QOM realizefn signature, dropped error.h inclusion.

Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Richard Henderson <rth@twiddle.net> (alpha, s390)
Cc: Peter Maydell <peter.maydell@linaro.org> (arm)
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> (cris, microblaze)
Cc: Michael Walle <michael@walle.cc> (lm32)
Cc: Aurélien Jarno <aurelien@aurel32.net> (mips, sh4)
Cc: Alexander Graf <agraf@suse.de> (ppc, s390)
Cc: qemu-ppc <qemu-ppc@nongnu.org>
Cc: Blue Swirl <blauwirbel@gmail.com> (sparc)
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> (unicore32)
Cc: Max Filippov <jcmvbkbc@gmail.com> (xtensa)
Cc: Jia Liu <proljc@gmail.com> (openrisc)

Andreas Färber (15):
  target-alpha: Update CPU to QOM realizefn
  target-arm: Update CPU to QOM realizefn
  target-i386: Update CPU to QOM realizefn
  target-openrisc: Update CPU to QOM realizefn
  target-ppc: Update CPU to QOM realizefn
  target-cris: Introduce QOM realizefn for CRISCPU
  target-lm32: Introduce QOM realizefn for LM32CPU
  target-m68k: Introduce QOM realizefn for M68kCPU
  target-microblaze: Introduce QOM realizefn for MicroBlazeCPU
  target-mips: Introduce QOM realizefn for MIPSCPU
  target-s390x: Introduce QOM realizefn for S390CPU
  target-sh4: Introduce QOM realizefn for SuperHCPU
  target-sparc: Introduce QOM realizefn for SPARCCPU
  target-unicore32: Introduce QOM realizefn for UniCore32CPU
  target-xtensa: Introduce QOM realizefn for XtensaCPU

 target-alpha/cpu.c            |   15 +++++++++++----
 target-arm/cpu-qom.h          |    1 -
 target-arm/cpu.c              |   15 ++++++++-------
 target-arm/helper.c           |    7 ++++---
 target-cris/cpu.c             |   11 +++++++++++
 target-cris/translate.c       |    3 +--
 target-i386/cpu-qom.h         |    3 ---
 target-i386/cpu.c             |    7 +++++--
 target-i386/helper.c          |    2 +-
 target-lm32/cpu.c             |   14 ++++++++++++--
 target-lm32/helper.c          |    4 ++--
 target-m68k/cpu.c             |   11 +++++++++++
 target-m68k/helper.c          |    3 +--
 target-microblaze/cpu.c       |   11 +++++++++++
 target-microblaze/translate.c |    3 +--
 target-mips/cpu.c             |   11 +++++++++++
 target-mips/translate.c       |    5 +++--
 target-openrisc/cpu.c         |    9 ++++++---
 target-openrisc/cpu.h         |    2 --
 target-ppc/translate_init.c   |    9 ++++++---
 target-s390x/cpu.c            |   10 ++++++++++
 target-s390x/helper.c         |    4 +++-
 target-sh4/cpu.c              |   11 +++++++++++
 target-sh4/translate.c        |    5 +++--
 target-sparc/cpu.c            |   13 ++++++++++++-
 target-unicore32/cpu.c        |   15 +++++++++++++++
 target-unicore32/helper.c     |    2 +-
 target-xtensa/cpu.c           |   10 ++++++++++
 target-xtensa/helper.c        |    4 +++-
 29 Dateien geändert, 173 Zeilen hinzugefügt(+), 47 Zeilen entfernt(-)

-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 01/15] target-alpha: Update CPU to QOM realizefn

[Andreas Färber]

Update the alpha_cpu_realize() signature and hook up to
DeviceClass::realize. Set realized = true in cpu_alpha_init().

qapi/error.h is included through qdev now and no longer needed.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-alpha/cpu.c |   15 +++++++++++----
 1 Datei geändert, 11 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)

diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index 40e9809..3ce509c 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -21,12 +21,11 @@
 
 #include "cpu.h"
 #include "qemu-common.h"
-#include "qapi/error.h"
 
 
-static void alpha_cpu_realize(Object *obj, Error **errp)
+static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
 {
-    AlphaCPU *cpu = ALPHA_CPU(obj);
+    AlphaCPU *cpu = ALPHA_CPU(dev);
 
     qemu_init_vcpu(&cpu->env);
 }
@@ -130,7 +129,7 @@ AlphaCPU *cpu_alpha_init(const char *cpu_model)
 
     env->cpu_model_str = cpu_model;
 
-    alpha_cpu_realize(OBJECT(cpu), NULL);
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
     return cpu;
 }
 
@@ -244,6 +243,13 @@ static void alpha_cpu_initfn(Object *obj)
     env->fen = 1;
 }
 
+static void alpha_cpu_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = alpha_cpu_realizefn;
+}
+
 static const TypeInfo alpha_cpu_type_info = {
     .name = TYPE_ALPHA_CPU,
     .parent = TYPE_CPU,
@@ -251,6 +257,7 @@ static const TypeInfo alpha_cpu_type_info = {
     .instance_init = alpha_cpu_initfn,
     .abstract = true,
     .class_size = sizeof(AlphaCPUClass),
+    .class_init = alpha_cpu_class_init,
 };
 
 static void alpha_cpu_register_types(void)
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 02/15] target-arm: Update CPU to QOM realizefn

[Andreas Färber]

Turn arm_cpu_realize() into a QOM realize function, no longer called
via cpu.h prototype. To maintain the semantics of cpu_init(), set
realized = true explicitly in cpu_arm_init().

Move CPU reset and vCPU initialization into the realizefn.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-arm/cpu-qom.h |    1 -
 target-arm/cpu.c     |   15 ++++++++-------
 target-arm/helper.c  |    7 ++++---
 3 Dateien geändert, 12 Zeilen hinzugefügt(+), 11 Zeilen entfernt(-)

diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 0f455c4..91c6eb1 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -107,7 +107,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
 
 #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
 
-void arm_cpu_realize(ARMCPU *cpu);
 void register_cp_regs_for_features(ARMCPU *cpu);
 
 #endif
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 07588a1..480acbe 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -147,14 +147,9 @@ static void arm_cpu_finalizefn(Object *obj)
     g_hash_table_destroy(cpu->cp_regs);
 }
 
-void arm_cpu_realize(ARMCPU *cpu)
+static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
 {
-    /* This function is called by cpu_arm_init() because it
-     * needs to do common actions based on feature bits, etc
-     * that have been set by the subclass init functions.
-     * When we have QOM realize support it should become
-     * a true realize function instead.
-     */
+    ARMCPU *cpu = ARM_CPU(dev);
     CPUARMState *env = &cpu->env;
     /* Some features automatically imply others: */
     if (arm_feature(env, ARM_FEATURE_V7)) {
@@ -197,6 +192,9 @@ void arm_cpu_realize(ARMCPU *cpu)
     }
 
     register_cp_regs_for_features(cpu);
+
+    cpu_reset(CPU(cpu));
+    qemu_init_vcpu(env);
 }
 
 /* CPU models */
@@ -763,6 +761,9 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
 {
     ARMCPUClass *acc = ARM_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(acc);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = arm_cpu_realizefn;
 
     acc->parent_reset = cc->reset;
     cc->reset = arm_cpu_reset;
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 37c34a1..f4553de 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1270,14 +1270,12 @@ ARMCPU *cpu_arm_init(const char *cpu_model)
     cpu = ARM_CPU(object_new(cpu_model));
     env = &cpu->env;
     env->cpu_model_str = cpu_model;
-    arm_cpu_realize(cpu);
 
     if (tcg_enabled() && !inited) {
         inited = 1;
         arm_translate_init();
     }
 
-    cpu_reset(CPU(cpu));
     if (arm_feature(env, ARM_FEATURE_NEON)) {
         gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
                                  51, "arm-neon.xml", 0);
@@ -1288,7 +1286,10 @@ ARMCPU *cpu_arm_init(const char *cpu_model)
         gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
                                  19, "arm-vfp.xml", 0);
     }
-    qemu_init_vcpu(env);
+
+    /* TODO this should be set centrally, once possible */
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
+
     return cpu;
 }
 
-- 
1.7.10.4

Re: [Qemu-devel] [RFC qom-cpu 02/15] target-arm: Update CPU to QOM realizefn

[Eduardo Habkost]

On Wed, Jan 16, 2013 at 06:32:47AM +0100, Andreas Färber wrote:
[...]
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 37c34a1..f4553de 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -1270,14 +1270,12 @@ ARMCPU *cpu_arm_init(const char *cpu_model)
>      cpu = ARM_CPU(object_new(cpu_model));
>      env = &cpu->env;
>      env->cpu_model_str = cpu_model;
> -    arm_cpu_realize(cpu);
>  
>      if (tcg_enabled() && !inited) {
>          inited = 1;
>          arm_translate_init();
>      }
>  
> -    cpu_reset(CPU(cpu));
>      if (arm_feature(env, ARM_FEATURE_NEON)) {
>          gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
>                                   51, "arm-neon.xml", 0);

Some arm_feature() checks here (e.g. ARM_FEATURE_VFP3) depend on
set_feature() calls done by arm_cpu_realize[fn]().

On the other hand, I won't be surprised if gdb_register_coprocessor()
needs to be called before qemu_init_vcpu(). I also don't know if it is
safe to call gdb_register_coprocessor() before cpu_reset().

Why not move all the code between the "arm_cpu_realize(cpu)" and "return
cpu" lines to the realize function as-is, instead of moving only part of
the code? If arm requires these steps to be run after creating a CPU, I
consider all of them part of the CPU realization process.


> @@ -1288,7 +1286,10 @@ ARMCPU *cpu_arm_init(const char *cpu_model)
>          gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
>                                   19, "arm-vfp.xml", 0);
>      }
> -    qemu_init_vcpu(env);
> +
> +    /* TODO this should be set centrally, once possible */
> +    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
> +
>      return cpu;
>  }
>  
> -- 
> 1.7.10.4
> 
> 

-- 
Eduardo

Re: [Qemu-devel] [RFC qom-cpu 02/15] target-arm: Update CPU to QOM realizefn

[Andreas Färber]

Am 16.01.2013 16:52, schrieb Eduardo Habkost:
> On Wed, Jan 16, 2013 at 06:32:47AM +0100, Andreas Färber wrote:
> [...]
>> diff --git a/target-arm/helper.c b/target-arm/helper.c
>> index 37c34a1..f4553de 100644
>> --- a/target-arm/helper.c
>> +++ b/target-arm/helper.c
>> @@ -1270,14 +1270,12 @@ ARMCPU *cpu_arm_init(const char *cpu_model)
>>      cpu = ARM_CPU(object_new(cpu_model));
>>      env = &cpu->env;
>>      env->cpu_model_str = cpu_model;
>> -    arm_cpu_realize(cpu);
>>  
>>      if (tcg_enabled() && !inited) {
>>          inited = 1;
>>          arm_translate_init();
>>      }
>>  
>> -    cpu_reset(CPU(cpu));
>>      if (arm_feature(env, ARM_FEATURE_NEON)) {
>>          gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
>>                                   51, "arm-neon.xml", 0);
> 
> Some arm_feature() checks here (e.g. ARM_FEATURE_VFP3) depend on
> set_feature() calls done by arm_cpu_realize[fn]().

Ouch!

> On the other hand, I won't be surprised if gdb_register_coprocessor()
> needs to be called before qemu_init_vcpu(). I also don't know if it is
> safe to call gdb_register_coprocessor() before cpu_reset().
> 
> Why not move all the code between the "arm_cpu_realize(cpu)" and "return
> cpu" lines to the realize function as-is, instead of moving only part of
> the code? If arm requires these steps to be run after creating a CPU, I
> consider all of them part of the CPU realization process.

That was not directly possible because the helper functions registered
are here in helper.c. What I'll do is to put these into a separate
function that I can call from realizefn.

Thanks,
Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

[Qemu-devel] [RFC qom-cpu 03/15] target-i386: Update CPU to QOM realizefn

[Andreas Färber]

Adapt the signature of x86_cpu_realize(), hook up to
DeviceClass::realize and set realized = true in cpu_x86_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
---
 target-i386/cpu-qom.h |    3 ---
 target-i386/cpu.c     |    7 +++++--
 target-i386/helper.c  |    2 +-
 3 Dateien geändert, 6 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-)

diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
index 332916a..3478dc9 100644
--- a/target-i386/cpu-qom.h
+++ b/target-i386/cpu-qom.h
@@ -72,8 +72,5 @@ static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
 
 #define ENV_GET_CPU(e) CPU(x86_env_get_cpu(e))
 
-/* TODO Drop once ObjectClass::realize is available */
-void x86_cpu_realize(Object *obj, Error **errp);
-
 
 #endif
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 333745b..640dcdb 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2140,9 +2140,9 @@ static void x86_cpu_apic_init(X86CPU *cpu, Error **errp)
 }
 #endif
 
-void x86_cpu_realize(Object *obj, Error **errp)
+static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
 {
-    X86CPU *cpu = X86_CPU(obj);
+    X86CPU *cpu = X86_CPU(dev);
     CPUX86State *env = &cpu->env;
 
     if (env->cpuid_7_0_ebx_features && env->cpuid_level < 7) {
@@ -2247,6 +2247,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
 {
     X86CPUClass *xcc = X86_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = x86_cpu_realizefn;
 
     xcc->parent_reset = cc->reset;
     cc->reset = x86_cpu_reset;
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 547c25e..bf43d6a 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1280,7 +1280,7 @@ X86CPU *cpu_x86_init(const char *cpu_model)
         return NULL;
     }
 
-    x86_cpu_realize(OBJECT(cpu), &error);
+    object_property_set_bool(OBJECT(cpu), true, "realized", &error);
     if (error) {
         error_free(error);
         object_delete(OBJECT(cpu));
-- 
1.7.10.4

Re: [Qemu-devel] [RFC qom-cpu 03/15] target-i386: Update CPU to QOM realizefn

[Igor Mammedov]

On Wed, 16 Jan 2013 06:32:48 +0100
Andreas Färber <afaerber@suse.de> wrote:

> Adapt the signature of x86_cpu_realize(), hook up to
> DeviceClass::realize and set realized = true in cpu_x86_init().
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> Cc: Eduardo Habkost <ehabkost@redhat.com>
> Cc: Igor Mammedov <imammedo@redhat.com>
Reviewed-By: Igor Mammedov <imammedo@redhat.com>

> ---
>  target-i386/cpu-qom.h |    3 ---
>  target-i386/cpu.c     |    7 +++++--
>  target-i386/helper.c  |    2 +-
>  3 Dateien geändert, 6 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-)
> 
> diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
> index 332916a..3478dc9 100644
> --- a/target-i386/cpu-qom.h
> +++ b/target-i386/cpu-qom.h
> @@ -72,8 +72,5 @@ static inline X86CPU *x86_env_get_cpu(CPUX86State *env)
>  
>  #define ENV_GET_CPU(e) CPU(x86_env_get_cpu(e))
>  
> -/* TODO Drop once ObjectClass::realize is available */
> -void x86_cpu_realize(Object *obj, Error **errp);
> -
>  
>  #endif
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 333745b..640dcdb 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -2140,9 +2140,9 @@ static void x86_cpu_apic_init(X86CPU *cpu, Error
> **errp) }
>  #endif
>  
> -void x86_cpu_realize(Object *obj, Error **errp)
> +static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
>  {
> -    X86CPU *cpu = X86_CPU(obj);
> +    X86CPU *cpu = X86_CPU(dev);
>      CPUX86State *env = &cpu->env;
>  
>      if (env->cpuid_7_0_ebx_features && env->cpuid_level < 7) {
> @@ -2247,6 +2247,9 @@ static void x86_cpu_common_class_init(ObjectClass
> *oc, void *data) {
>      X86CPUClass *xcc = X86_CPU_CLASS(oc);
>      CPUClass *cc = CPU_CLASS(oc);
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +
> +    dc->realize = x86_cpu_realizefn;
>  
>      xcc->parent_reset = cc->reset;
>      cc->reset = x86_cpu_reset;
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 547c25e..bf43d6a 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -1280,7 +1280,7 @@ X86CPU *cpu_x86_init(const char *cpu_model)
>          return NULL;
>      }
>  
> -    x86_cpu_realize(OBJECT(cpu), &error);
> +    object_property_set_bool(OBJECT(cpu), true, "realized", &error);
>      if (error) {
>          error_free(error);
>          object_delete(OBJECT(cpu));

Re: [Qemu-devel] [RFC qom-cpu 03/15] target-i386: Update CPU to QOM realizefn

[Eduardo Habkost]

On Wed, Jan 16, 2013 at 06:32:48AM +0100, Andreas Färber wrote:
[...]
> @@ -2247,6 +2247,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
>  {
>      X86CPUClass *xcc = X86_CPU_CLASS(oc);
>      CPUClass *cc = CPU_CLASS(oc);
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +
> +    dc->realize = x86_cpu_realizefn;

The DeviceClass documenation says:

"Any type may override the @realize and/or @unrealize callbacks but
needs to call (and thus save) the parent type's implementation if so
desired."

Why are you not following it?

-- 
Eduardo

Re: [Qemu-devel] [RFC qom-cpu 03/15] target-i386: Update CPU to QOM realizefn

[Andreas Färber]

Am 16.01.2013 17:04, schrieb Eduardo Habkost:
> On Wed, Jan 16, 2013 at 06:32:48AM +0100, Andreas Färber wrote:
> [...]
>> @@ -2247,6 +2247,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
>>  {
>>      X86CPUClass *xcc = X86_CPU_CLASS(oc);
>>      CPUClass *cc = CPU_CLASS(oc);
>> +    DeviceClass *dc = DEVICE_CLASS(oc);
>> +
>> +    dc->realize = x86_cpu_realizefn;
> 
> The DeviceClass documenation says:
> 
> "Any type may override the @realize and/or @unrealize callbacks but
> needs to call (and thus save) the parent type's implementation if so
> desired."
> 
> Why are you not following it?

"if so desired" - I didn't desire or need to call code that calls an
initfn that no longer exists after this patch. Same as the ISADevice
conversion series did not unnecessarily call the DeviceClass-level
backwards-compatibility realizefn: to save time-consuming
...Class::parent_realizefn field additions and to not in the end call
code that doesn't NULL-check ...DeviceClass::init. That's qdev's old
"leaf type" concept mentioned in the same documentation.

I mentioned in the cover letter that this needs to be changed once a
CPUClass-level realizefn is introduced. I could introduce a no-op
realizefn there and do the regular store+call.

Note that wherever we set realized = true on CPUs, we need to test and
re-review for further unchecked uses of parent_bus. It has been pushed
to qom-cpu-realize branch for anyone that wants to play with the latest
version.

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [RFC qom-cpu 03/15] target-i386: Update CPU to QOM realizefn

[Eduardo Habkost]

On Wed, Jan 16, 2013 at 11:52:47PM +0100, Andreas Färber wrote:
> Am 16.01.2013 17:04, schrieb Eduardo Habkost:
> > On Wed, Jan 16, 2013 at 06:32:48AM +0100, Andreas Färber wrote:
> > [...]
> >> @@ -2247,6 +2247,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
> >>  {
> >>      X86CPUClass *xcc = X86_CPU_CLASS(oc);
> >>      CPUClass *cc = CPU_CLASS(oc);
> >> +    DeviceClass *dc = DEVICE_CLASS(oc);
> >> +
> >> +    dc->realize = x86_cpu_realizefn;
> > 
> > The DeviceClass documenation says:
> > 
> > "Any type may override the @realize and/or @unrealize callbacks but
> > needs to call (and thus save) the parent type's implementation if so
> > desired."
> > 
> > Why are you not following it?
> 
> "if so desired" - I didn't desire or need to call code that calls an
> initfn that no longer exists after this patch. Same as the ISADevice
> conversion series did not unnecessarily call the DeviceClass-level
> backwards-compatibility realizefn: to save time-consuming
> ...Class::parent_realizefn field additions and to not in the end call
> code that doesn't NULL-check ...DeviceClass::init. That's qdev's old
> "leaf type" concept mentioned in the same documentation.

I had read "if so desired" as "if it's desired to override the realize
callback", not as "if it's desired to call the parent realize function".

I believed every class could assume that subclasses would never override
realize() without calling the parent class' realize function (so we
could add stuff to DeviceClass.realize and CPUClass.realize in the
future and be sure that the code would be always called).

But from the documentation mentioning "new leaf types should consult
their respective parent type", it looks like this decision would be
taken/documented in each base class. If that's the case, then OK.


> 
> I mentioned in the cover letter that this needs to be changed once a
> CPUClass-level realizefn is introduced. I could introduce a no-op
> realizefn there and do the regular store+call.

That was the semantics I was expecting: base classes would safely
introduce realize functions without worrying if subclasses would
override it incorrectly and break it.

Anyway, saving the parent function in every subclass is so cumbersome
that simply documenting it as "CPUClass subclasses must call
qemu_init_vcpu()" sounds easier than "CPUClass subclasses must save the
parent's realize() and call it". So:

Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>

> 
> Note that wherever we set realized = true on CPUs, we need to test and
> re-review for further unchecked uses of parent_bus. It has been pushed
> to qom-cpu-realize branch for anyone that wants to play with the latest
> version.
> 
> Andreas
> 
> -- 
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

-- 
Eduardo

Re: [Qemu-devel] [RFC qom-cpu 03/15] target-i386: Update CPU to QOM realizefn

[Andreas Färber]

Am 17.01.2013 00:43, schrieb Eduardo Habkost:
> On Wed, Jan 16, 2013 at 11:52:47PM +0100, Andreas Färber wrote:
>> Am 16.01.2013 17:04, schrieb Eduardo Habkost:
>>> On Wed, Jan 16, 2013 at 06:32:48AM +0100, Andreas Färber wrote:
>>> [...]
>>>> @@ -2247,6 +2247,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
>>>>  {
>>>>      X86CPUClass *xcc = X86_CPU_CLASS(oc);
>>>>      CPUClass *cc = CPU_CLASS(oc);
>>>> +    DeviceClass *dc = DEVICE_CLASS(oc);
>>>> +
>>>> +    dc->realize = x86_cpu_realizefn;
>>>
>>> The DeviceClass documenation says:
>>>
>>> "Any type may override the @realize and/or @unrealize callbacks but
>>> needs to call (and thus save) the parent type's implementation if so
>>> desired."
>>>
>>> Why are you not following it?
>>
>> "if so desired" - I didn't desire or need to call code that calls an
>> initfn that no longer exists after this patch. Same as the ISADevice
>> conversion series did not unnecessarily call the DeviceClass-level
>> backwards-compatibility realizefn: to save time-consuming
>> ...Class::parent_realizefn field additions and to not in the end call
>> code that doesn't NULL-check ...DeviceClass::init. That's qdev's old
>> "leaf type" concept mentioned in the same documentation.
> 
> I had read "if so desired" as "if it's desired to override the realize
> callback", not as "if it's desired to call the parent realize function".

Sorry, and I thought my documentation was too verbose already. ;)

> I believed every class could assume that subclasses would never override
> realize() without calling the parent class' realize function (so we
> could add stuff to DeviceClass.realize and CPUClass.realize in the
> future and be sure that the code would be always called).
> 
> But from the documentation mentioning "new leaf types should consult
> their respective parent type", it looks like this decision would be
> taken/documented in each base class. If that's the case, then OK.

I've sent out a patch improving QOM and DeviceClass documentation. :)

>> I mentioned in the cover letter that this needs to be changed once a
>> CPUClass-level realizefn is introduced. I could introduce a no-op
>> realizefn there and do the regular store+call.
> 
> That was the semantics I was expecting: base classes would safely
> introduce realize functions without worrying if subclasses would
> override it incorrectly and break it.

We could do that if we fix up the respective DeviceClass::init,
SysBusDeviceClass::init etc. code. Question is (just as with some x86
CPU code) whether it's worth cleaning up when we know that it is to be
refactored later.

> Anyway, saving the parent function in every subclass is so cumbersome
> that simply documenting it as "CPUClass subclasses must call
> qemu_init_vcpu()" sounds easier than "CPUClass subclasses must save the
> parent's realize() and call it".
[snip]

Actually that particular piece of code is unrelated to this discussion
since qemu_init_vcpu() still operates on CPUArchState and thus cannot be
moved into CPUClass yet. The reason is that
cpus.c:qemu_kvm_cpu_thread_fn sets cpu_single_env, and I do not see a
solution for that - suggestions or patches welcome.

However, I see that kvm-all.c:kvm_on_sigbus_vcpu() can be switched to
CPUState now, so that cpus.c:qemu_kvm_eat_signals() can be changed to
CPUState, used from cpus.c:qemu_kvm_wait_io_event().
But cpus.c:cpu_thread_is_idle() still uses env->halted, which is blocked
by the search for an acceptable solution to flush the TLB at CPUState
level (exec.c:cpu_common_post_load()).

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [RFC qom-cpu 03/15] target-i386: Update CPU to QOM realizefn

[Eduardo Habkost]

On Thu, Jan 17, 2013 at 09:03:59AM +0100, Andreas Färber wrote:
[...]
> >> I mentioned in the cover letter that this needs to be changed once a
> >> CPUClass-level realizefn is introduced. I could introduce a no-op
> >> realizefn there and do the regular store+call.
> > 
> > That was the semantics I was expecting: base classes would safely
> > introduce realize functions without worrying if subclasses would
> > override it incorrectly and break it.
> 
> We could do that if we fix up the respective DeviceClass::init,
> SysBusDeviceClass::init etc. code. Question is (just as with some x86
> CPU code) whether it's worth cleaning up when we know that it is to be
> refactored later.

Actually I am not sure it would be nice to require every single class to
save/call the parent realize function. I am starting to like the more
relaxed requirement.  :-)


> 
> > Anyway, saving the parent function in every subclass is so cumbersome
> > that simply documenting it as "CPUClass subclasses must call
> > qemu_init_vcpu()" sounds easier than "CPUClass subclasses must save the
> > parent's realize() and call it".
> [snip]
> 
> Actually that particular piece of code is unrelated to this discussion
> since qemu_init_vcpu() still operates on CPUArchState and thus cannot be
> moved into CPUClass yet. The reason is that
> cpus.c:qemu_kvm_cpu_thread_fn sets cpu_single_env, and I do not see a
> solution for that - suggestions or patches welcome.

I used qemu_init_vcpu() as an example because it's something called by
the realize function for all targets, and one day could be called by a
common CPUClass realize function. I didn't check if it was possible to
convert it today, already.

My point is: if you need to save the pointer and call the parent realize
function only if documented and required by the parent class, the parent
could as well simply document it as "subclasses of TYPE_FOO should
manually call foo_realize() if they override the realize function"
instead of "subclasses of TYPE_FOO should save and call the parent
realize function if they override de realize function". Won't it be
easier and simpler?

> 
> However, I see that kvm-all.c:kvm_on_sigbus_vcpu() can be switched to
> CPUState now, so that cpus.c:qemu_kvm_eat_signals() can be changed to
> CPUState, used from cpus.c:qemu_kvm_wait_io_event().
> But cpus.c:cpu_thread_is_idle() still uses env->halted, which is blocked
> by the search for an acceptable solution to flush the TLB at CPUState
> level (exec.c:cpu_common_post_load()).
> 
> Andreas
> 
> -- 
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

-- 
Eduardo

[Qemu-devel] [RFC qom-cpu 04/15] target-openrisc: Update CPU to QOM realizefn

[Andreas Färber]

Update the openrisc_cpu_realize() signature, hook it up to
DeviceClass::realize and set realized = true in cpu_openrisc_init().

qapi/error.h is now included through qdev and no longer needed.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-openrisc/cpu.c |    9 ++++++---
 target-openrisc/cpu.h |    2 --
 2 Dateien geändert, 6 Zeilen hinzugefügt(+), 5 Zeilen entfernt(-)

diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
index 56544d8..24205e3 100644
--- a/target-openrisc/cpu.c
+++ b/target-openrisc/cpu.c
@@ -62,9 +62,9 @@ static inline void set_feature(OpenRISCCPU *cpu, int feature)
     cpu->env.cpucfgr = cpu->feature;
 }
 
-void openrisc_cpu_realize(Object *obj, Error **errp)
+static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp)
 {
-    OpenRISCCPU *cpu = OPENRISC_CPU(obj);
+    OpenRISCCPU *cpu = OPENRISC_CPU(dev);
 
     qemu_init_vcpu(&cpu->env);
     cpu_reset(CPU(cpu));
@@ -117,6 +117,9 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
 {
     OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(occ);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = openrisc_cpu_realizefn;
 
     occ->parent_reset = cc->reset;
     cc->reset = openrisc_cpu_reset;
@@ -165,7 +168,7 @@ OpenRISCCPU *cpu_openrisc_init(const char *cpu_model)
     cpu = OPENRISC_CPU(object_new(cpu_model));
     cpu->env.cpu_model_str = cpu_model;
 
-    openrisc_cpu_realize(OBJECT(cpu), NULL);
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 
     return cpu;
 }
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 3beab45..a6243ea 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -33,7 +33,6 @@ struct OpenRISCCPU;
 #include "exec/cpu-defs.h"
 #include "fpu/softfloat.h"
 #include "qom/cpu.h"
-#include "qapi/error.h"
 
 #define TYPE_OPENRISC_CPU "or32-cpu"
 
@@ -340,7 +339,6 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)
 #define ENV_GET_CPU(e) CPU(openrisc_env_get_cpu(e))
 
 OpenRISCCPU *cpu_openrisc_init(const char *cpu_model);
-void openrisc_cpu_realize(Object *obj, Error **errp);
 
 void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf);
 int cpu_openrisc_exec(CPUOpenRISCState *s);
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 05/15] target-ppc: Update CPU to QOM realizefn

[Andreas Färber]

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-ppc/translate_init.c |    9 ++++++---
 1 Datei geändert, 6 Zeilen hinzugefügt(+), 3 Zeilen entfernt(-)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 3f199c4..45ed0a1 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -10029,9 +10029,9 @@ static int ppc_fixup_cpu(PowerPCCPU *cpu)
     return 0;
 }
 
-static void ppc_cpu_realize(Object *obj, Error **errp)
+static void ppc_cpu_realizefn(DeviceState *dev, Error **errp)
 {
-    PowerPCCPU *cpu = POWERPC_CPU(obj);
+    PowerPCCPU *cpu = POWERPC_CPU(dev);
     CPUPPCState *env = &cpu->env;
     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
     ppc_def_t *def = pcc->info;
@@ -10342,7 +10342,7 @@ PowerPCCPU *cpu_ppc_init(const char *cpu_model)
 
     env->cpu_model_str = cpu_model;
 
-    ppc_cpu_realize(OBJECT(cpu), &err);
+    object_property_set_bool(OBJECT(cpu), true, "realized", &err);
     if (err != NULL) {
         fprintf(stderr, "%s\n", error_get_pretty(err));
         error_free(err);
@@ -10563,6 +10563,9 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
 {
     PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = ppc_cpu_realizefn;
 
     pcc->parent_reset = cc->reset;
     cc->reset = ppc_cpu_reset;
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 06/15] target-cris: Introduce QOM realizefn for CRISCPU

[Andreas Färber]

Introduce realizefn and set realized = true from cpu_cris_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-cris/cpu.c       |   11 +++++++++++
 target-cris/translate.c |    3 +--
 2 Dateien geändert, 12 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-cris/cpu.c b/target-cris/cpu.c
index 3f64a57..4d9d831 100644
--- a/target-cris/cpu.c
+++ b/target-cris/cpu.c
@@ -55,6 +55,14 @@ static void cris_cpu_reset(CPUState *s)
 #endif
 }
 
+static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    CRISCPU *cpu = CRIS_CPU(dev);
+
+    cpu_reset(CPU(cpu));
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void cris_cpu_initfn(Object *obj)
 {
     CRISCPU *cpu = CRIS_CPU(obj);
@@ -65,9 +73,12 @@ static void cris_cpu_initfn(Object *obj)
 
 static void cris_cpu_class_init(ObjectClass *oc, void *data)
 {
+    DeviceClass *dc = DEVICE_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
     CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
 
+    dc->realize = cris_cpu_realizefn;
+
     ccc->parent_reset = cc->reset;
     cc->reset = cris_cpu_reset;
 }
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 09e6011..25ff490 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3558,8 +3558,7 @@ CRISCPU *cpu_cris_init(const char *cpu_model)
 
     env->pregs[PR_VR] = vr_by_name(cpu_model);
 
-    cpu_reset(CPU(cpu));
-    qemu_init_vcpu(env);
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 
     if (tcg_initialized) {
         return cpu;
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 07/15] target-lm32: Introduce QOM realizefn for LM32CPU

[Andreas Färber]

Introduce a realizefn and set realized = true in cpu_lm32_init().

Also move cpu_reset() call from initfn to realizefn.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-lm32/cpu.c    |   14 ++++++++++++--
 target-lm32/helper.c |    4 ++--
 2 Dateien geändert, 14 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)

diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c
index eca2dca..dfca130 100644
--- a/target-lm32/cpu.c
+++ b/target-lm32/cpu.c
@@ -42,6 +42,15 @@ static void lm32_cpu_reset(CPUState *s)
     memset(env, 0, offsetof(CPULM32State, breakpoints));
 }
 
+static void lm32_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    LM32CPU *cpu = LM32_CPU(dev);
+
+    cpu_reset(CPU(cpu));
+
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void lm32_cpu_initfn(Object *obj)
 {
     LM32CPU *cpu = LM32_CPU(obj);
@@ -50,14 +59,15 @@ static void lm32_cpu_initfn(Object *obj)
     cpu_exec_init(env);
 
     env->flags = 0;
-
-    cpu_reset(CPU(cpu));
 }
 
 static void lm32_cpu_class_init(ObjectClass *oc, void *data)
 {
     LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = lm32_cpu_realizefn;
 
     lcc->parent_reset = cc->reset;
     cc->reset = lm32_cpu_reset;
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index d76ea3f..a6691ad 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -212,13 +212,13 @@ LM32CPU *cpu_lm32_init(const char *cpu_model)
     env->num_wps = def->num_watchpoints;
     env->cfg = cfg_by_def(def);
 
-    qemu_init_vcpu(env);
-
     if (tcg_enabled() && !tcg_initialized) {
         tcg_initialized = 1;
         lm32_translate_init();
     }
 
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
+
     return cpu;
 }
 
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 08/15] target-m68k: Introduce QOM realizefn for M68kCPU

[Andreas Färber]

Introduce realizefn and set realized = true in cpu_m68k_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-m68k/cpu.c    |   11 +++++++++++
 target-m68k/helper.c |    3 +--
 2 Dateien geändert, 12 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
index ce89674..633fcc7 100644
--- a/target-m68k/cpu.c
+++ b/target-m68k/cpu.c
@@ -119,6 +119,14 @@ static const M68kCPUInfo m68k_cpus[] = {
     { .name = "any",   .instance_init = any_cpu_initfn },
 };
 
+static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    M68kCPU *cpu = M68K_CPU(dev);
+
+    cpu_reset(CPU(cpu));
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void m68k_cpu_initfn(Object *obj)
 {
     M68kCPU *cpu = M68K_CPU(obj);
@@ -131,6 +139,9 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
 {
     M68kCPUClass *mcc = M68K_CPU_CLASS(c);
     CPUClass *cc = CPU_CLASS(c);
+    DeviceClass *dc = DEVICE_CLASS(c);
+
+    dc->realize = m68k_cpu_realizefn;
 
     mcc->parent_reset = cc->reset;
     cc->reset = m68k_cpu_reset;
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 097fc78..14b399a 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -119,8 +119,7 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model)
     }
     /* TODO: Add [E]MAC registers.  */
 
-    cpu_reset(ENV_GET_CPU(env));
-    qemu_init_vcpu(env);
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
     return env;
 }
 
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 09/15] target-microblaze: Introduce QOM realizefn for MicroBlazeCPU

[Andreas Färber]

Introduce realizefn and set realized = true from cpu_mb_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-microblaze/cpu.c       |   11 +++++++++++
 target-microblaze/translate.c |    3 +--
 2 Dateien geändert, 12 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index 0f858fd..b59180d 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -84,6 +84,14 @@ static void mb_cpu_reset(CPUState *s)
 #endif
 }
 
+static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    MicroBlazeCPU *cpu = MICROBLAZE_CPU(dev);
+
+    cpu_reset(CPU(cpu));
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void mb_cpu_initfn(Object *obj)
 {
     MicroBlazeCPU *cpu = MICROBLAZE_CPU(obj);
@@ -96,9 +104,12 @@ static void mb_cpu_initfn(Object *obj)
 
 static void mb_cpu_class_init(ObjectClass *oc, void *data)
 {
+    DeviceClass *dc = DEVICE_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
     MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_CLASS(oc);
 
+    dc->realize = mb_cpu_realizefn;
+
     mcc->parent_reset = cc->reset;
     cc->reset = mb_cpu_reset;
 }
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 58ce712..a84856b 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1970,8 +1970,7 @@ MicroBlazeCPU *cpu_mb_init(const char *cpu_model)
 
     cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
 
-    cpu_reset(CPU(cpu));
-    qemu_init_vcpu(&cpu->env);
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 
     if (tcg_initialized) {
         return cpu;
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 10/15] target-mips: Introduce QOM realizefn for MIPSCPU

[Andreas Färber]

Introduce a realizefn and set realized = true from cpu_mips_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-mips/cpu.c       |   11 +++++++++++
 target-mips/translate.c |    5 +++--
 2 Dateien geändert, 14 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 10ff46d..bb782e1 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -42,6 +42,14 @@ static void mips_cpu_reset(CPUState *s)
     cpu_state_reset(env);
 }
 
+static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    MIPSCPU *cpu = MIPS_CPU(dev);
+
+    cpu_reset(CPU(cpu));
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void mips_cpu_initfn(Object *obj)
 {
     MIPSCPU *cpu = MIPS_CPU(obj);
@@ -54,6 +62,9 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
 {
     MIPSCPUClass *mcc = MIPS_CPU_CLASS(c);
     CPUClass *cc = CPU_CLASS(c);
+    DeviceClass *dc = DEVICE_CLASS(c);
+
+    dc->realize = mips_cpu_realizefn;
 
     mcc->parent_reset = cc->reset;
     cc->reset = mips_cpu_reset;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 206ba83..9ea9354 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15871,8 +15871,9 @@ MIPSCPU *cpu_mips_init(const char *cpu_model)
     fpu_init(env, def);
     mvp_init(env, def);
     mips_tcg_init();
-    cpu_reset(CPU(cpu));
-    qemu_init_vcpu(env);
+
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
+
     return cpu;
 }
 
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 11/15] target-s390x: Introduce QOM realizefn for S390CPU

[Andreas Färber]

Introduce realizefn and set realized = true in cpu_s390x_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-s390x/cpu.c    |   10 ++++++++++
 target-s390x/helper.c |    4 +++-
 2 Dateien geändert, 13 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)

diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index 2ed2312..94d8d93 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -45,6 +45,13 @@ static void s390_cpu_reset(CPUState *s)
     s390_add_running_cpu(env);
 }
 
+static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    S390CPU *cpu = S390_CPU(dev);
+
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void s390_cpu_initfn(Object *obj)
 {
     S390CPU *cpu = S390_CPU(obj);
@@ -73,6 +80,9 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
 {
     S390CPUClass *scc = S390_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(scc);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = s390_cpu_realizefn;
 
     scc->parent_reset = cc->reset;
     cc->reset = s390_cpu_reset;
diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index 9a132e6..45020b2 100644
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -85,7 +85,9 @@ S390CPU *cpu_s390x_init(const char *cpu_model)
     }
 
     env->cpu_model_str = cpu_model;
-    qemu_init_vcpu(env);
+
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
+
     return cpu;
 }
 
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 12/15] target-sh4: Introduce QOM realizefn for SuperHCPU

[Andreas Färber]

Introduce a realizefn and set realized = true in cpu_sh4_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-sh4/cpu.c       |   11 +++++++++++
 target-sh4/translate.c |    5 +++--
 2 Dateien geändert, 14 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)

diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c
index e4858a0..c07a012 100644
--- a/target-sh4/cpu.c
+++ b/target-sh4/cpu.c
@@ -53,6 +53,14 @@ static void superh_cpu_reset(CPUState *s)
     set_default_nan_mode(1, &env->fp_status);
 }
 
+static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    SuperHCPU *cpu = SUPERH_CPU(dev);
+
+    cpu_reset(CPU(cpu));
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void superh_cpu_initfn(Object *obj)
 {
     SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -65,9 +73,12 @@ static void superh_cpu_initfn(Object *obj)
 
 static void superh_cpu_class_init(ObjectClass *oc, void *data)
 {
+    DeviceClass *dc = DEVICE_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
     SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc);
 
+    dc->realize = superh_cpu_realizefn;
+
     scc->parent_reset = cc->reset;
     cc->reset = superh_cpu_reset;
 }
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 260aaab..2409a10 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -253,9 +253,10 @@ SuperHCPU *cpu_sh4_init(const char *cpu_model)
     env->features = def->features;
     sh4_translate_init();
     env->cpu_model_str = cpu_model;
-    cpu_reset(CPU(cpu));
     cpu_register(env, def);
-    qemu_init_vcpu(env);
+
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
+
     return cpu;
 }
 
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 13/15] target-sparc: Introduce QOM realizefn for SPARCCPU

[Andreas Färber]

Introduce realizefn and set realized = true in cpu_sparc_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-sparc/cpu.c |   13 ++++++++++++-
 1 Datei geändert, 12 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)

diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index f404aa8..b38fe0d 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -122,7 +122,8 @@ SPARCCPU *cpu_sparc_init(const char *cpu_model)
         object_delete(OBJECT(cpu));
         return NULL;
     }
-    qemu_init_vcpu(env);
+
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 
     return cpu;
 }
@@ -851,6 +852,13 @@ void cpu_dump_state(CPUSPARCState *env, FILE *f, fprintf_function cpu_fprintf,
     cpu_fprintf(f, "\n");
 }
 
+static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    SPARCCPU *cpu = SPARC_CPU(dev);
+
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void sparc_cpu_initfn(Object *obj)
 {
     SPARCCPU *cpu = SPARC_CPU(obj);
@@ -871,6 +879,9 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data)
 {
     SPARCCPUClass *scc = SPARC_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = sparc_cpu_realizefn;
 
     scc->parent_reset = cc->reset;
     cc->reset = sparc_cpu_reset;
-- 
1.7.10.4

[Qemu-devel] [RFC qom-cpu 14/15] target-unicore32: Introduce QOM realizefn for UniCore32CPU

[Andreas Färber]

Introduce a realizefn and set realized = true in uc32_cpu_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-unicore32/cpu.c    |   15 +++++++++++++++
 target-unicore32/helper.c |    2 +-
 2 Dateien geändert, 16 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)

diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
index 884c101..22330ad 100644
--- a/target-unicore32/cpu.c
+++ b/target-unicore32/cpu.c
@@ -61,6 +61,13 @@ static const UniCore32CPUInfo uc32_cpus[] = {
     { .name = "any",        .instance_init = uc32_any_cpu_initfn },
 };
 
+static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    UniCore32CPU *cpu = UNICORE32_CPU(dev);
+
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void uc32_cpu_initfn(Object *obj)
 {
     UniCore32CPU *cpu = UNICORE32_CPU(obj);
@@ -80,6 +87,13 @@ static void uc32_cpu_initfn(Object *obj)
     tlb_flush(env, 1);
 }
 
+static void uc32_cpu_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = uc32_cpu_realizefn;
+}
+
 static void uc32_register_cpu_type(const UniCore32CPUInfo *info)
 {
     TypeInfo type_info = {
@@ -98,6 +112,7 @@ static const TypeInfo uc32_cpu_type_info = {
     .instance_init = uc32_cpu_initfn,
     .abstract = true,
     .class_size = sizeof(UniCore32CPUClass),
+    .class_init = uc32_cpu_class_init,
 };
 
 static void uc32_cpu_register_types(void)
diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c
index 5359538..347d842 100644
--- a/target-unicore32/helper.c
+++ b/target-unicore32/helper.c
@@ -42,7 +42,7 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model)
         uc32_translate_init();
     }
 
-    qemu_init_vcpu(env);
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
     return env;
 }
 
-- 
1.7.10.4

Re: [Qemu-devel] [RFC qom-cpu 14/15] target-unicore32: Introduce QOM realizefn for UniCore32CPU

[guanxuetao]

> Introduce a realizefn and set realized = true in uc32_cpu_init().
>
> Signed-off-by: Andreas F盲rber <afaerber@suse.de>

LGTM.

Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>

> ---
>  target-unicore32/cpu.c    |   15 +++++++++++++++
>  target-unicore32/helper.c |    2 +-
>  2 Dateien ge盲ndert, 16 Zeilen hinzugef眉gt(+), 1 Zeile entfernt(-)
>
> diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c
> index 884c101..22330ad 100644
> --- a/target-unicore32/cpu.c
> +++ b/target-unicore32/cpu.c
> @@ -61,6 +61,13 @@ static const UniCore32CPUInfo uc32_cpus[] = {
>      { .name = "any",        .instance_init = uc32_any_cpu_initfn },
>  };
>
> +static void uc32_cpu_realizefn(DeviceState *dev, Error **errp)
> +{
> +    UniCore32CPU *cpu = UNICORE32_CPU(dev);
> +
> +    qemu_init_vcpu(&cpu->env);
> +}
> +
>  static void uc32_cpu_initfn(Object *obj)
>  {
>      UniCore32CPU *cpu = UNICORE32_CPU(obj);
> @@ -80,6 +87,13 @@ static void uc32_cpu_initfn(Object *obj)
>      tlb_flush(env, 1);
>  }
>
> +static void uc32_cpu_class_init(ObjectClass *oc, void *data)
> +{
> +    DeviceClass *dc = DEVICE_CLASS(oc);
> +
> +    dc->realize = uc32_cpu_realizefn;
> +}
> +
>  static void uc32_register_cpu_type(const UniCore32CPUInfo *info)
>  {
>      TypeInfo type_info = {
> @@ -98,6 +112,7 @@ static const TypeInfo uc32_cpu_type_info = {
>      .instance_init = uc32_cpu_initfn,
>      .abstract = true,
>      .class_size = sizeof(UniCore32CPUClass),
> +    .class_init = uc32_cpu_class_init,
>  };
>
>  static void uc32_cpu_register_types(void)
> diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c
> index 5359538..347d842 100644
> --- a/target-unicore32/helper.c
> +++ b/target-unicore32/helper.c
> @@ -42,7 +42,7 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model)
>          uc32_translate_init();
>      }
>
> -    qemu_init_vcpu(env);
> +    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
>      return env;
>  }
>
> --
> 1.7.10.4
>

[Qemu-devel] [RFC qom-cpu 15/15] target-xtensa: Introduce QOM realizefn for XtensaCPU

[Andreas Färber]

Introduce realizefn and set realized = true in cpu_xtensa_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-xtensa/cpu.c    |   10 ++++++++++
 target-xtensa/helper.c |    4 +++-
 2 Dateien geändert, 13 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)

diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
index 035b07c..de363ae 100644
--- a/target-xtensa/cpu.c
+++ b/target-xtensa/cpu.c
@@ -56,6 +56,13 @@ static void xtensa_cpu_reset(CPUState *s)
     reset_mmu(env);
 }
 
+static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
+{
+    XtensaCPU *cpu = XTENSA_CPU(dev);
+
+    qemu_init_vcpu(&cpu->env);
+}
+
 static void xtensa_cpu_initfn(Object *obj)
 {
     XtensaCPU *cpu = XTENSA_CPU(obj);
@@ -66,9 +73,12 @@ static void xtensa_cpu_initfn(Object *obj)
 
 static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
 {
+    DeviceClass *dc = DEVICE_CLASS(oc);
     CPUClass *cc = CPU_CLASS(oc);
     XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc);
 
+    dc->realize = xtensa_cpu_realizefn;
+
     xcc->parent_reset = cc->reset;
     cc->reset = xtensa_cpu_reset;
 }
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 94c03a1..14bcc7e 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -104,7 +104,9 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model)
     }
 
     xtensa_irq_init(env);
-    qemu_init_vcpu(env);
+
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
+
     return cpu;
 }
 
-- 
1.7.10.4