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From: "Andreas Färber" <afaerber@suse.de>
To: qemu-devel@nongnu.org
Cc: "Andreas Färber" <afaerber@suse.de>
Subject: [Qemu-devel] [RFC qom-cpu 04/15] target-openrisc: Update CPU to QOM realizefn
Date: Wed, 16 Jan 2013 06:32:49 +0100	[thread overview]
Message-ID: <1358314380-9400-5-git-send-email-afaerber@suse.de> (raw)
In-Reply-To: <1358314380-9400-1-git-send-email-afaerber@suse.de>

Update the openrisc_cpu_realize() signature, hook it up to
DeviceClass::realize and set realized = true in cpu_openrisc_init().

qapi/error.h is now included through qdev and no longer needed.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 target-openrisc/cpu.c |    9 ++++++---
 target-openrisc/cpu.h |    2 --
 2 Dateien geändert, 6 Zeilen hinzugefügt(+), 5 Zeilen entfernt(-)

diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c
index 56544d8..24205e3 100644
--- a/target-openrisc/cpu.c
+++ b/target-openrisc/cpu.c
@@ -62,9 +62,9 @@ static inline void set_feature(OpenRISCCPU *cpu, int feature)
     cpu->env.cpucfgr = cpu->feature;
 }
 
-void openrisc_cpu_realize(Object *obj, Error **errp)
+static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp)
 {
-    OpenRISCCPU *cpu = OPENRISC_CPU(obj);
+    OpenRISCCPU *cpu = OPENRISC_CPU(dev);
 
     qemu_init_vcpu(&cpu->env);
     cpu_reset(CPU(cpu));
@@ -117,6 +117,9 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
 {
     OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
     CPUClass *cc = CPU_CLASS(occ);
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = openrisc_cpu_realizefn;
 
     occ->parent_reset = cc->reset;
     cc->reset = openrisc_cpu_reset;
@@ -165,7 +168,7 @@ OpenRISCCPU *cpu_openrisc_init(const char *cpu_model)
     cpu = OPENRISC_CPU(object_new(cpu_model));
     cpu->env.cpu_model_str = cpu_model;
 
-    openrisc_cpu_realize(OBJECT(cpu), NULL);
+    object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
 
     return cpu;
 }
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 3beab45..a6243ea 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -33,7 +33,6 @@ struct OpenRISCCPU;
 #include "exec/cpu-defs.h"
 #include "fpu/softfloat.h"
 #include "qom/cpu.h"
-#include "qapi/error.h"
 
 #define TYPE_OPENRISC_CPU "or32-cpu"
 
@@ -340,7 +339,6 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)
 #define ENV_GET_CPU(e) CPU(openrisc_env_get_cpu(e))
 
 OpenRISCCPU *cpu_openrisc_init(const char *cpu_model);
-void openrisc_cpu_realize(Object *obj, Error **errp);
 
 void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf);
 int cpu_openrisc_exec(CPUOpenRISCState *s);
-- 
1.7.10.4

  parent reply	other threads:[~2013-01-16  5:33 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-16  5:32 [Qemu-devel] [RFC qom-cpu 00/15] CPUState QOM realizefn support Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 01/15] target-alpha: Update CPU to QOM realizefn Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 02/15] target-arm: " Andreas Färber
2013-01-16 15:52   ` Eduardo Habkost
2013-01-16 22:37     ` Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 03/15] target-i386: " Andreas Färber
2013-01-16 13:12   ` Igor Mammedov
2013-01-16 16:04   ` Eduardo Habkost
2013-01-16 22:52     ` Andreas Färber
2013-01-16 23:43       ` Eduardo Habkost
2013-01-17  8:03         ` Andreas Färber
2013-01-17 12:58           ` Eduardo Habkost
2013-01-16  5:32 ` Andreas Färber [this message]
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 05/15] target-ppc: " Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 06/15] target-cris: Introduce QOM realizefn for CRISCPU Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 07/15] target-lm32: Introduce QOM realizefn for LM32CPU Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 08/15] target-m68k: Introduce QOM realizefn for M68kCPU Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 09/15] target-microblaze: Introduce QOM realizefn for MicroBlazeCPU Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 10/15] target-mips: Introduce QOM realizefn for MIPSCPU Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 11/15] target-s390x: Introduce QOM realizefn for S390CPU Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 12/15] target-sh4: Introduce QOM realizefn for SuperHCPU Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 13/15] target-sparc: Introduce QOM realizefn for SPARCCPU Andreas Färber
2013-01-16  5:32 ` [Qemu-devel] [RFC qom-cpu 14/15] target-unicore32: Introduce QOM realizefn for UniCore32CPU Andreas Färber
2013-01-16 12:08   ` guanxuetao
2013-01-16  5:33 ` [Qemu-devel] [RFC qom-cpu 15/15] target-xtensa: Introduce QOM realizefn for XtensaCPU Andreas Färber

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