From: "Andreas Färber" <afaerber@suse.de>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Alexander Graf" <agraf@suse.de>,
"Blue Swirl" <blauwirbel@gmail.com>,
"Michael Walle" <michael@walle.cc>,
"Anthony Liguori" <anthony@codemonkey.ws>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Andreas Färber" <afaerber@suse.de>,
"Aurélien Jarno" <aurelien@aurel32.net>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [RFC qom-cpu-next 0/9] QOM CPUState, part 9: CPU_COMMON for interrupts
Date: Sat, 2 Feb 2013 12:57:18 +0100 [thread overview]
Message-ID: <1359806247-27799-1-git-send-email-afaerber@suse.de> (raw)
Hello,
Most of its prerequisites in v1.4.0-rc0 or in qom-cpu-next, this series
proceeds with moving fields from CPU_COMMON / CPU*State to CPUState.
For large Coding Style cleanups it seems too late now (Hard Freeze).
But the two function declarations might be considered an acceptable cleanup.
Posting this as an RFC only since I still don't like the x86 VMState version
restrictions since quite a few people on #qemu keep using really old versions.
I hope to tackle this by inserting my WIP VMState refactorings, using X86CPU,
which can - ugly but nontheless - access CPUState::halted field for version 5.
While that change would be pretty invasive, it'll be largely mechanical.
The final two patches are the main reason for posting this already:
They demonstrate that the do_interrupt() functions can be replaced by a
CPUClass hook, while not loosing too much performance since cpu_exec() can
obtain CPUClass once and reuse it for all calls rather than calling a wrapper
that would do this per call.
The final patch showcases for arm how the hook can be overridden for models.
A further candidate is cris once CRISCPU subclasses have been introduced.
Available for testing at:
git://github.com/afaerber/qemu-cpu.git qom-cpu-9.v1
https://github.com/afaerber/qemu-cpu/commits/qom-cpu-9.v1
Regards,
Andreas
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Aurélien Jarno <aurelien@aurel32.net>
Cc: Alexander Graf <agraf@suse.de>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Michael Walle <michael@walle.cc>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Andreas Färber (9):
target-s390x: Drop unused cpu_s390x_close() prototype
target-lm32: Drop unused cpu_lm32_close() prototype
target-cris/helper.c: Update Coding Style
target-i386: Drop version 5 CPU VMState support
cpu: Move halted and interrupt_request fields to CPUState
exec: Pass CPUState to cpu_reset_interrupt()
cpu: Pass CPUState to cpu_interrupt()
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
target-arm: Override do_interrupt for ARMv7-M profile
cpu-exec.c | 70 ++++---
cpus.c | 6 +-
exec.c | 19 +-
gdbstub.c | 2 +-
hw/alpha_typhoon.c | 18 +-
hw/apic.c | 25 +--
hw/arm_pic.c | 20 +-
hw/cris_pic_cpu.c | 14 +-
hw/leon3.c | 12 +-
hw/lm32_boards.c | 9 +-
hw/lpc_ich9.c | 2 +-
hw/microblaze_pic_cpu.c | 15 +-
hw/milkymist.c | 9 +-
hw/mips_int.c | 10 +-
hw/omap1.c | 11 +-
hw/openrisc_pic.c | 5 +-
hw/openrisc_timer.c | 4 +-
hw/pc.c | 14 +-
hw/pc_piix.c | 3 +-
hw/ppc.c | 34 +--
hw/ppc/e500.c | 10 +-
hw/ppc405_uc.c | 4 +-
hw/ppce500_spin.c | 2 +-
hw/puv3.c | 10 +-
hw/pxa2xx.c | 7 +-
hw/pxa2xx_gpio.c | 5 +-
hw/pxa2xx_pic.c | 13 +-
hw/s390x/s390-virtio.c | 14 +-
hw/sh_intc.c | 14 +-
hw/spapr.c | 10 +-
hw/spapr_hcall.c | 2 +-
hw/spapr_rtas.c | 6 +-
hw/sun4m.c | 35 ++--
hw/sun4u.c | 26 ++-
hw/xen_machine_pv.c | 6 +-
hw/xtensa_pic.c | 12 +-
include/exec/cpu-all.h | 15 --
include/exec/cpu-defs.h | 2 -
include/qom/cpu.h | 39 ++++
kvm-all.c | 6 +-
qom/cpu.c | 7 +
target-alpha/cpu-qom.h | 2 +
target-alpha/cpu.c | 1 +
target-alpha/cpu.h | 5 +-
target-alpha/helper.c | 4 +-
target-alpha/translate.c | 3 +-
target-arm/cpu-qom.h | 3 +
target-arm/cpu.c | 15 +-
target-arm/cpu.h | 5 +-
target-arm/helper.c | 23 ++-
target-arm/op_helper.c | 4 +-
target-cris/cpu-qom.h | 2 +
target-cris/cpu.c | 2 +
target-cris/cpu.h | 5 +-
target-cris/helper.c | 402 ++++++++++++++++++------------------
target-cris/translate.c | 3 +-
target-i386/cpu-qom.h | 6 +
target-i386/cpu.c | 4 +-
target-i386/cpu.h | 23 ++-
target-i386/helper.c | 18 +-
target-i386/kvm.c | 50 ++---
target-i386/machine.c | 10 +-
target-i386/misc_helper.c | 21 +-
target-i386/seg_helper.c | 5 +-
target-i386/svm_helper.c | 9 +-
target-lm32/cpu-qom.h | 2 +
target-lm32/cpu.c | 2 +
target-lm32/cpu.h | 6 +-
target-lm32/helper.c | 5 +-
target-lm32/op_helper.c | 4 +-
target-m68k/cpu-qom.h | 2 +
target-m68k/cpu.c | 1 +
target-m68k/cpu.h | 5 +-
target-m68k/helper.c | 10 +-
target-m68k/op_helper.c | 14 +-
target-m68k/qregs.def | 1 -
target-m68k/translate.c | 8 +-
target-microblaze/cpu-qom.h | 2 +
target-microblaze/cpu.c | 1 +
target-microblaze/cpu.h | 5 +-
target-microblaze/helper.c | 9 +-
target-mips/cpu-qom.h | 2 +
target-mips/cpu.c | 2 +
target-mips/cpu.h | 5 +-
target-mips/helper.c | 5 +-
target-mips/op_helper.c | 23 ++-
target-mips/translate.c | 4 +-
target-openrisc/cpu.c | 1 +
target-openrisc/cpu.h | 6 +-
target-openrisc/interrupt.c | 4 +-
target-openrisc/interrupt_helper.c | 3 +-
target-openrisc/sys_helper.c | 3 +-
target-ppc/cpu-qom.h | 2 +
target-ppc/cpu.h | 6 +-
target-ppc/excp_helper.c | 34 ++-
target-ppc/helper_regs.h | 11 +-
target-ppc/kvm.c | 16 +-
target-ppc/translate.c | 3 +-
target-ppc/translate_init.c | 1 +
target-s390x/cpu-qom.h | 2 +
target-s390x/cpu.c | 9 +-
target-s390x/cpu.h | 13 +-
target-s390x/helper.c | 19 +-
target-sh4/cpu-qom.h | 2 +
target-sh4/cpu.c | 1 +
target-sh4/cpu.h | 5 +-
target-sh4/helper.c | 13 +-
target-sh4/op_helper.c | 4 +-
target-sparc/cpu-qom.h | 2 +
target-sparc/cpu.c | 2 +
target-sparc/cpu.h | 6 +-
target-sparc/int32_helper.c | 4 +-
target-sparc/int64_helper.c | 4 +-
target-unicore32/cpu-qom.h | 2 +
target-unicore32/cpu.c | 1 +
target-unicore32/cpu.h | 5 +-
target-unicore32/helper.c | 5 +-
target-unicore32/softmmu.c | 6 +-
target-xtensa/cpu-qom.h | 2 +
target-xtensa/cpu.c | 1 +
target-xtensa/cpu.h | 1 -
target-xtensa/helper.c | 5 +-
target-xtensa/op_helper.c | 5 +-
translate-all.c | 18 +-
xen-all.c | 10 +-
125 Dateien geändert, 882 Zeilen hinzugefügt(+), 645 Zeilen entfernt(-)
--
1.7.10.4
next reply other threads:[~2013-02-02 11:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-02 11:57 Andreas Färber [this message]
2013-02-02 11:57 ` [Qemu-devel] [PATCH for-1.4? qom-cpu-next 1/9] target-s390x: Drop unused cpu_s390x_close() prototype Andreas Färber
2013-02-02 11:57 ` [Qemu-devel] [PATCH for-1.4? qom-cpu-next 2/9] target-lm32: Drop unused cpu_lm32_close() prototype Andreas Färber
2013-02-02 11:57 ` [Qemu-devel] [PATCH RESEND qom-cpu-next 3/9] target-cris/helper.c: Update Coding Style Andreas Färber
2013-02-02 11:57 ` [Qemu-devel] [RFC qom-cpu-next 4/9] target-i386: Drop version 5 CPU VMState support Andreas Färber
2013-02-02 11:57 ` [Qemu-devel] [RFC qom-cpu-next 5/9] cpu: Move halted and interrupt_request fields to CPUState Andreas Färber
2013-02-02 11:57 ` [Qemu-devel] [RFC qom-cpu-next 6/9] exec: Pass CPUState to cpu_reset_interrupt() Andreas Färber
2013-02-02 11:57 ` [Qemu-devel] [RFC qom-cpu-next 7/9] cpu: Pass CPUState to cpu_interrupt() Andreas Färber
2013-02-02 11:57 ` [Qemu-devel] [RFC qom-cpu-next 8/9] cpu: Replace do_interrupt() by CPUClass::do_interrupt method Andreas Färber
2013-02-02 11:57 ` [Qemu-devel] [RFC qom-cpu-next 9/9] target-arm: Override do_interrupt for ARMv7-M profile Andreas Färber
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1359806247-27799-1-git-send-email-afaerber@suse.de \
--to=afaerber@suse.de \
--cc=agraf@suse.de \
--cc=anthony@codemonkey.ws \
--cc=aurelien@aurel32.net \
--cc=blauwirbel@gmail.com \
--cc=edgar.iglesias@gmail.com \
--cc=michael@walle.cc \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).