From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:51528) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U1edw-0007bu-Ge for qemu-devel@nongnu.org; Sat, 02 Feb 2013 10:04:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U1edt-0005Xg-Px for qemu-devel@nongnu.org; Sat, 02 Feb 2013 10:04:36 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 2 Feb 2013 16:04:10 +0100 Message-Id: <1359817456-25561-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH RFC qom-cpu-next 0/6] QOM CPUState VMStateDescriptions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Eduardo Habkost , quintela@redhat.com, Jia Liu , Michael Roth , Alexander Graf , Blue Swirl , Michael Walle , qemu-ppc@nongnu.org, Anthony Liguori , Igor Mammedov , David Gibson , =?UTF-8?q?Andreas=20F=C3=A4rber?= , =?UTF-8?q?Aur=C3=A9lien=20Jarno?= , Richard Henderson Hello, In response to patches from Juan [1], this series implements a declarativ= e way for CPUs to register their CPU-specific VMStateDescription. There are subtle differences between CPU and devices in how they register their savevm handlers and VMStateDescription respectively: * CPUs register one VMStateDescription "cpu_common" plus savevm handlers = for the target-specifics (machine.c:cpu_{save,load}). Devices register one VMStateDescription with a subsection for common st= ate where necessary. * CPUs use their cpu_index field as instance_id. Devices pass -1 as instance_id, resulting in highest index on the bus p= lus 1. Note: The current cpu_index numbering is not hot-unplug-safe. My code assumes that registering "cpu_common" for CPUArchState (until cha= nged in CPUState part 9 series) while registering "cpu" for CPUState is compat= ible, since by not using DeviceState::vmsd infrastructure registration order re= mains guaranteed the same. Patches 4-5 demonstrate how two VMStateDescription-prepared but not yet migratable targets would look like if we want to adopt a consistent patte= rn for VMStateDescription registration and layout throughout targets. Question is whether we want to take that legacy burden on us or whether t= o simply expose exec.c:vmstate_cpu_common and embed it PCI-like into the prepared VMStateDescriptions for alpha and openrisc and register them thr= ough DeviceClass::vmsd instead. An alternative might be registering "cpu_common" as before but with instance_id -1 and registering "cpu" through DeviceClass::vmsd, since exec.c:calculate_new_instance_id() takes the name string into account. But that would be inconsistent with how devices behave VMState-wise. Targets that have not yet been converted to VMState [1, 2] are left untou= ched. Known conflicts: - CPUState part 9 v1 series (target-*/cpu.c:class_init), to be rebased on= this. Available for testing here: git://github.com/afaerber/qemu-cpu.git qom-cpu-vmstate.v1 https://github.com/afaerber/qemu-cpu/commits/qom-cpu-vmstate.v1 What triggered this series was moving the halted and interrupt_request fi= elds from CPU_COMMON to CPUState: https://lists.nongnu.org/archive/html/qemu-devel/2013-02/msg00203.html Since both are in vmstate_cpu_common, they needed to be moved together, a= nd "cpu_common" will need to operate on CPUState then. At the same time x86 can no longer access the halted field from CPUX86State via VMSTATE_ macro= s, so either we need to drop uses of such fields (i.e., version 5) or make i= t possible to access CPUState fields in x86 VMState through parent_obj fiel= d. Further, in explaining intended uses of S390CPU vs. CPUS390XState I was reminded that VMState is currently a limiting factor for placing fields i= nto CPUState-derived types rather than into CPU*State. Regards, Andreas [1] https://lists.nongnu.org/archive/html/qemu-devel/2012-05/msg00524.htm= l [2] https://lists.nongnu.org/archive/html/qemu-devel/2012-09/msg03451.htm= l Cc: Juan Quintela Cc: Michael Roth Cc: Anthony Liguori Cc: Blue Swirl Cc: Aur=C3=A9lien Jarno Cc: Eduardo Habkost Cc: Igor Mammedov Cc: Richard Henderson Cc: Michael Walle Cc: Jia Liu Cc: David Gibson Cc: Alexander Graf Cc: qemu-ppc@nongnu.org Andreas F=C3=A4rber (6): cpu: Register VMStateDescription through CPUState target-i386: Update VMStateDescription to X86CPU target-lm32: Update VMStateDescription to LM32CPU target-alpha: Register VMStateDescription for AlphaCPU target-openrisc: Register VMStateDescription for OpenRISCCPU cpu: Guard cpu_{save,load}() definitions exec.c | 13 ++- include/qemu-common.h | 2 + include/qom/cpu.h | 3 + target-alpha/cpu-qom.h | 2 + target-alpha/cpu.c | 3 + target-alpha/machine.c | 64 ++++++-------- target-i386/cpu-qom.h | 2 + target-i386/cpu.c | 4 + target-i386/cpu.h | 2 - target-i386/machine.c | 215 ++++++++++++++++++++++-----------------= ------ target-lm32/cpu-qom.h | 2 + target-lm32/cpu.c | 4 + target-lm32/cpu.h | 2 - target-lm32/machine.c | 36 +++----- target-openrisc/cpu.c | 3 + target-openrisc/cpu.h | 2 + target-openrisc/machine.c | 33 +++---- 17 Dateien ge=C3=A4ndert, 200 Zeilen hinzugef=C3=BCgt(+), 192 Zeilen ent= fernt(-) --=20 1.7.10.4