From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:51548) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U1edx-0007gP-WE for qemu-devel@nongnu.org; Sat, 02 Feb 2013 10:04:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1U1edw-0005YD-0F for qemu-devel@nongnu.org; Sat, 02 Feb 2013 10:04:37 -0500 Received: from cantor2.suse.de ([195.135.220.15]:42114 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1U1edv-0005Y3-Nv for qemu-devel@nongnu.org; Sat, 02 Feb 2013 10:04:35 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 2 Feb 2013 16:04:14 +0100 Message-Id: <1359817456-25561-5-git-send-email-afaerber@suse.de> In-Reply-To: <1359817456-25561-1-git-send-email-afaerber@suse.de> References: <1359817456-25561-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [RFC qom-cpu-next 4/6] target-alpha: Register VMStateDescription for AlphaCPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Richard Henderson , =?UTF-8?q?Andreas=20F=C3=A4rber?= , quintela@redhat.com Commit b758aca1f6cdb175634812b79f5560c36c902d00 (target-alpha: Enable the alpha-softmmu target.) introduced cpu_{save,load}() functions but didn't define CPU_SAVE_VERSION, so they were never registered. Drop cpu_{save,load}() and register the VMStateDescription via CPUClass. This operates on the AlphaCPU object instead of CPUAlphaState. Signed-off-by: Andreas F=C3=A4rber --- target-alpha/cpu-qom.h | 2 ++ target-alpha/cpu.c | 3 +++ target-alpha/machine.c | 64 ++++++++++++++++++++++--------------------= ------ 3 Dateien ge=C3=A4ndert, 34 Zeilen hinzugef=C3=BCgt(+), 35 Zeilen entfer= nt(-) diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h index c0f6c6d..2cf6511 100644 --- a/target-alpha/cpu-qom.h +++ b/target-alpha/cpu-qom.h @@ -72,5 +72,7 @@ static inline AlphaCPU *alpha_env_get_cpu(CPUAlphaState= *env) =20 #define ENV_GET_CPU(e) CPU(alpha_env_get_cpu(e)) =20 +extern const struct VMStateDescription vmstate_alpha_cpu; + =20 #endif diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index 0cdae69..09f8cdc 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -261,6 +261,9 @@ static void alpha_cpu_class_init(ObjectClass *oc, voi= d *data) dc->realize =3D alpha_cpu_realizefn; =20 cc->class_by_name =3D alpha_cpu_class_by_name; +#ifndef CONFIG_USER_ONLY + cc->vmsd =3D &vmstate_alpha_cpu; +#endif } =20 static const TypeInfo alpha_cpu_type_info =3D { diff --git a/target-alpha/machine.c b/target-alpha/machine.c index 1c9edd1..bdad91e 100644 --- a/target-alpha/machine.c +++ b/target-alpha/machine.c @@ -3,14 +3,18 @@ =20 static int get_fpcr(QEMUFile *f, void *opaque, size_t size) { - CPUAlphaState *env =3D opaque; + AlphaCPU *cpu =3D opaque; + CPUAlphaState *env =3D &cpu->env; + cpu_alpha_store_fpcr(env, qemu_get_be64(f)); return 0; } =20 static void put_fpcr(QEMUFile *f, void *opaque, size_t size) { - CPUAlphaState *env =3D opaque; + AlphaCPU *cpu =3D opaque; + CPUAlphaState *env =3D &cpu->env; + qemu_put_be64(f, cpu_alpha_load_fpcr(env)); } =20 @@ -21,8 +25,8 @@ static const VMStateInfo vmstate_fpcr =3D { }; =20 static VMStateField vmstate_cpu_fields[] =3D { - VMSTATE_UINTTL_ARRAY(ir, CPUAlphaState, 31), - VMSTATE_UINTTL_ARRAY(fir, CPUAlphaState, 31), + VMSTATE_UINTTL_ARRAY(env.ir, AlphaCPU, 31), + VMSTATE_UINTTL_ARRAY(env.fir, AlphaCPU, 31), /* Save the architecture value of the fpcr, not the internally expanded version. Since this architecture value does not exist in memory to be stored, this requires a but of hoop @@ -37,51 +41,41 @@ static VMStateField vmstate_cpu_fields[] =3D { .flags =3D VMS_SINGLE, .offset =3D 0 }, - VMSTATE_UINTTL(pc, CPUAlphaState), - VMSTATE_UINTTL(unique, CPUAlphaState), - VMSTATE_UINTTL(lock_addr, CPUAlphaState), - VMSTATE_UINTTL(lock_value, CPUAlphaState), + VMSTATE_UINTTL(env.pc, AlphaCPU), + VMSTATE_UINTTL(env.unique, AlphaCPU), + VMSTATE_UINTTL(env.lock_addr, AlphaCPU), + VMSTATE_UINTTL(env.lock_value, AlphaCPU), /* Note that lock_st_addr is not saved; it is a temporary used during the execution of the st[lq]_c insns. */ =20 - VMSTATE_UINT8(ps, CPUAlphaState), - VMSTATE_UINT8(intr_flag, CPUAlphaState), - VMSTATE_UINT8(pal_mode, CPUAlphaState), - VMSTATE_UINT8(fen, CPUAlphaState), + VMSTATE_UINT8(env.ps, AlphaCPU), + VMSTATE_UINT8(env.intr_flag, AlphaCPU), + VMSTATE_UINT8(env.pal_mode, AlphaCPU), + VMSTATE_UINT8(env.fen, AlphaCPU), =20 - VMSTATE_UINT32(pcc_ofs, CPUAlphaState), + VMSTATE_UINT32(env.pcc_ofs, AlphaCPU), =20 - VMSTATE_UINTTL(trap_arg0, CPUAlphaState), - VMSTATE_UINTTL(trap_arg1, CPUAlphaState), - VMSTATE_UINTTL(trap_arg2, CPUAlphaState), + VMSTATE_UINTTL(env.trap_arg0, AlphaCPU), + VMSTATE_UINTTL(env.trap_arg1, AlphaCPU), + VMSTATE_UINTTL(env.trap_arg2, AlphaCPU), =20 - VMSTATE_UINTTL(exc_addr, CPUAlphaState), - VMSTATE_UINTTL(palbr, CPUAlphaState), - VMSTATE_UINTTL(ptbr, CPUAlphaState), - VMSTATE_UINTTL(vptptr, CPUAlphaState), - VMSTATE_UINTTL(sysval, CPUAlphaState), - VMSTATE_UINTTL(usp, CPUAlphaState), + VMSTATE_UINTTL(env.exc_addr, AlphaCPU), + VMSTATE_UINTTL(env.palbr, AlphaCPU), + VMSTATE_UINTTL(env.ptbr, AlphaCPU), + VMSTATE_UINTTL(env.vptptr, AlphaCPU), + VMSTATE_UINTTL(env.sysval, AlphaCPU), + VMSTATE_UINTTL(env.usp, AlphaCPU), =20 - VMSTATE_UINTTL_ARRAY(shadow, CPUAlphaState, 8), - VMSTATE_UINTTL_ARRAY(scratch, CPUAlphaState, 24), + VMSTATE_UINTTL_ARRAY(env.shadow, AlphaCPU, 8), + VMSTATE_UINTTL_ARRAY(env.scratch, AlphaCPU, 24), =20 VMSTATE_END_OF_LIST() }; =20 -static const VMStateDescription vmstate_cpu =3D { +const VMStateDescription vmstate_alpha_cpu =3D { .name =3D "cpu", .version_id =3D 1, .minimum_version_id =3D 1, .minimum_version_id_old =3D 1, .fields =3D vmstate_cpu_fields, }; - -void cpu_save(QEMUFile *f, void *opaque) -{ - vmstate_save_state(f, &vmstate_cpu, opaque); -} - -int cpu_load(QEMUFile *f, void *opaque, int version_id) -{ - return vmstate_load_state(f, &vmstate_cpu, opaque, version_id); -} --=20 1.7.10.4