From: David Gibson <david@gibson.dropbear.id.au>
To: agraf@suse.de
Cc: David Gibson <david@gibson.dropbear.id.au>,
qemu-ppc@nongnu.org, afaerber@suse.de, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 47/48] target-ppc: Move ppc tlb_fill implementation into mmu_helper.c
Date: Tue, 12 Mar 2013 21:31:49 +1100 [thread overview]
Message-ID: <1363084310-4115-48-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1363084310-4115-1-git-send-email-david@gibson.dropbear.id.au>
For softmmu builds the interface from the generic code to the target
specific MMU implementation is through the tlb_fill() function. For ppc
this is currently in mem_helper.c, whereas it would make more sense in
mmu_helper.c. This patch moves it, which also allows
cpu_ppc_handle_mmu_fault() to become a local function in mmu_helper.c
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target-ppc/cpu.h | 2 --
target-ppc/mem_helper.c | 38 --------------------------------------
target-ppc/mmu_helper.c | 40 ++++++++++++++++++++++++++++++++++++++--
3 files changed, 38 insertions(+), 42 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index b616a94..0b2d0b9 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1090,8 +1090,6 @@ int cpu_ppc_exec (CPUPPCState *s);
is returned if the signal was handled by the virtual CPU. */
int cpu_ppc_signal_handler (int host_signum, void *pinfo,
void *puc);
-int cpu_ppc_handle_mmu_fault (CPUPPCState *env, target_ulong address, int rw,
- int mmu_idx);
void do_interrupt (CPUPPCState *env);
void ppc_hw_interrupt (CPUPPCState *env);
#if defined(CONFIG_USER_ONLY)
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
index ba383c8..9783e52 100644
--- a/target-ppc/mem_helper.c
+++ b/target-ppc/mem_helper.c
@@ -252,41 +252,3 @@ STVE(stvewx, cpu_stl_data, bswap32, u32)
#undef HI_IDX
#undef LO_IDX
-
-/*****************************************************************************/
-/* Softmmu support */
-#if !defined(CONFIG_USER_ONLY)
-
-#define MMUSUFFIX _mmu
-
-#define SHIFT 0
-#include "exec/softmmu_template.h"
-
-#define SHIFT 1
-#include "exec/softmmu_template.h"
-
-#define SHIFT 2
-#include "exec/softmmu_template.h"
-
-#define SHIFT 3
-#include "exec/softmmu_template.h"
-
-/* try to fill the TLB and return an exception if error. If retaddr is
- NULL, it means that the function was called in C code (i.e. not
- from generated code or from helper.c) */
-/* XXX: fix it to restore all registers */
-void tlb_fill(CPUPPCState *env, target_ulong addr, int is_write, int mmu_idx,
- uintptr_t retaddr)
-{
- int ret;
-
- ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx);
- if (unlikely(ret != 0)) {
- if (likely(retaddr)) {
- /* now we have a real cpu fault */
- cpu_restore_state(env, retaddr);
- }
- helper_raise_exception_err(env, env->exception_index, env->error_code);
- }
-}
-#endif /* !CONFIG_USER_ONLY */
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 525eb6f..4c41673 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -1384,8 +1384,8 @@ static void booke206_update_mas_tlb_miss(CPUPPCState *env, target_ulong address,
}
/* Perform address translation */
-int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
- int mmu_idx)
+static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address,
+ int rw, int mmu_idx)
{
mmu_ctx_t ctx;
int access_type;
@@ -2777,3 +2777,39 @@ void helper_booke206_tlbflush(CPUPPCState *env, uint32_t type)
booke206_flush_tlb(env, flags, 1);
}
+
+
+/*****************************************************************************/
+
+#define MMUSUFFIX _mmu
+
+#define SHIFT 0
+#include "exec/softmmu_template.h"
+
+#define SHIFT 1
+#include "exec/softmmu_template.h"
+
+#define SHIFT 2
+#include "exec/softmmu_template.h"
+
+#define SHIFT 3
+#include "exec/softmmu_template.h"
+
+/* try to fill the TLB and return an exception if error. If retaddr is
+ NULL, it means that the function was called in C code (i.e. not
+ from generated code or from helper.c) */
+/* XXX: fix it to restore all registers */
+void tlb_fill(CPUPPCState *env, target_ulong addr, int is_write, int mmu_idx,
+ uintptr_t retaddr)
+{
+ int ret;
+
+ ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx);
+ if (unlikely(ret != 0)) {
+ if (likely(retaddr)) {
+ /* now we have a real cpu fault */
+ cpu_restore_state(env, retaddr);
+ }
+ helper_raise_exception_err(env, env->exception_index, env->error_code);
+ }
+}
--
1.7.10.4
next prev parent reply other threads:[~2013-03-12 10:33 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-12 10:31 [Qemu-devel] [0/48] target-ppc: MMU implementation cleanup for hash MMUs David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 01/48] target-ppc: Remove vestigial PowerPC 620 support David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 02/48] target-ppc: Trivial cleanups in mmu_helper.c David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 03/48] target-ppc: Remove address check for logging David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 04/48] target-ppc: Move SLB handling into a mmu-hash64.c David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 05/48] target-ppc: Disentangle pte_check() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 06/48] target-ppc: Disentangle find_pte() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 07/48] target-ppc: Disentangle get_segment() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 08/48] target-ppc: Rework get_physical_address() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 09/48] target-ppc: Disentangle get_physical_address() paths David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 10/48] target-ppc: Disentangle hash mmu paths for cpu_ppc_handle_mmu_fault David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 11/48] target-ppc: Disentangle hash mmu versions of cpu_get_phys_page_debug() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 12/48] target-ppc: Disentangle hash mmu helper functions David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 13/48] target-ppc: Don't share get_pteg_offset() between 32 and 64-bit David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 14/48] target-ppc: Disentangle BAT code for 32-bit hash MMUs David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 15/48] target-ppc: mmu_ctx_t should not be a global type David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 16/48] mmu-hash*: Add header file for definitions David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 17/48] mmu-hash*: Add hash pte load/store helpers David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 18/48] mmu-hash*: Reduce use of access_type David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 19/48] mmu-hash64: Remove nx from mmu_ctx_hash64 David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 20/48] mmu-hash*: Remove eaddr field from mmu_ctx_hash{32, 64} David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 21/48] mmu-hash*: Combine ppc_hash{32, 64}_get_physical_address and get_segment{32, 64}() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 22/48] mmu-hash32: Split out handling of direct store segments David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 23/48] mmu-hash32: Split direct store segment handling into a helper David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 24/48] mmu-hash*: Cleanup segment-level NX check David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 25/48] mmu-hash*: Don't keep looking for PTEs after we find a match David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 26/48] mmu-hash*: Separate PTEG searching from permissions checking David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 27/48] mmu-hash*: Make find_pte{32, 64} do more of the job of finding ptes David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 28/48] mmu-hash*: Remove permission checking from find_pte{32, 64}() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 29/48] mmu-hash64: Clean up ppc_hash64_htab_lookup() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 30/48] mmu-hash*: Fold pte_check*() logic into caller David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 31/48] mmu-hash32: Remove odd pointer usage from BAT code David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 32/48] mmu-hash32: Split BAT size logic from permissions logic David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 33/48] mmu-hash32: Clean up BAT matching logic David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 34/48] mmu-hash32: Cleanup BAT lookup David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 35/48] mmu-hash32: Don't look up page tables on BAT permission error David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 36/48] mmu-hash*: Don't update PTE flags when permission is denied David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 37/48] mmu-hash32: Remove nx from context structure David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 38/48] mmu-hash*: Clean up permission checking David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 39/48] mmu-hash64: Factor SLB N bit into permissions bits David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 40/48] mmu-hash*: Clean up PTE flags update David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 41/48] mmu-hash*: Clean up real address calculation David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 42/48] mmu-hash*: Correctly mask RPN from hash PTE David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 43/48] mmu-hash*: Don't use full ppc_hash{32, 64}_translate() path for get_phys_page_debug() David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 44/48] mmu-hash*: Merge translate and fault handling functions David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 45/48] mmu-hash64: Implement Virtual Page Class Key Protection David Gibson
2013-03-12 10:31 ` [Qemu-devel] [PATCH 46/48] target-ppc: Split user only code out of mmu_helper.c David Gibson
2013-03-12 10:31 ` David Gibson [this message]
2013-03-12 10:31 ` [Qemu-devel] [PATCH 48/48] target-ppc: Use QOM method dispatch for MMU fault handling David Gibson
2013-03-13 0:42 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2013-03-21 13:43 ` [Qemu-devel] [0/48] target-ppc: MMU implementation cleanup for hash MMUs Alexander Graf
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