From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44546) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UFMVp-0000PS-L1 for qemu-devel@nongnu.org; Tue, 12 Mar 2013 06:33:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UFMV8-0004pc-LX for qemu-devel@nongnu.org; Tue, 12 Mar 2013 06:32:53 -0400 From: David Gibson Date: Tue, 12 Mar 2013 21:31:50 +1100 Message-Id: <1363084310-4115-49-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1363084310-4115-1-git-send-email-david@gibson.dropbear.id.au> References: <1363084310-4115-1-git-send-email-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 48/48] target-ppc: Use QOM method dispatch for MMU fault handling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: agraf@suse.de Cc: David Gibson , qemu-ppc@nongnu.org, afaerber@suse.de, qemu-devel@nongnu.org After previous cleanups, the many scattered checks of env->mmu_model in the ppc MMU implementation have, at least for "classic" hash MMUs been reduced (almost) to a single switch at the top of cpu_ppc_handle_mmu_fault(). An explicit switch is still a pretty ugly way of handling this though. N= ow that Andreas F=C3=A4rber's CPU QOM cleanups for ppc have gone in, it's qu= ite straightforward to instead make the handle_mmu_fault function a QOM metho= d on the CPU object. This patch implements such a scheme, initializing the method pointer at the same time as the mmu_model variable. We need to keep the latter arou= nd for now, because of the MMU types (BookE, 4xx, et al) which haven't been converted to the new scheme yet, and also for a few other uses. It would be good to clean those up eventually. Signed-off-by: David Gibson --- target-ppc/cpu-qom.h | 4 ++++ target-ppc/mmu_helper.c | 24 +++++++----------------- target-ppc/translate_init.c | 20 +++++++++++++++++++- 3 files changed, 30 insertions(+), 18 deletions(-) diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 2bf0ab6..8a08958 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -68,6 +68,10 @@ typedef struct PowerPCCPUClass { #endif void (*init_proc)(CPUPPCState *env); int (*check_pow)(CPUPPCState *env); +#if defined(CONFIG_SOFTMMU) + int (*handle_mmu_fault)(CPUPPCState *env, target_ulong eaddr, int rw= x, + int mmu_idx); +#endif } PowerPCCPUClass; =20 /** diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index 4c41673..acf0133 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c @@ -1391,22 +1391,6 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *e= nv, target_ulong address, int access_type; int ret =3D 0; =20 - switch (env->mmu_model) { -#if defined(TARGET_PPC64) - case POWERPC_MMU_64B: - case POWERPC_MMU_2_06: - case POWERPC_MMU_2_06d: - return ppc_hash64_handle_mmu_fault(env, address, rw, mmu_idx); -#endif - - case POWERPC_MMU_32B: - case POWERPC_MMU_601: - return ppc_hash32_handle_mmu_fault(env, address, rw, mmu_idx); - - default: - ; /* Otherwise fall through to the general code below */ - } - if (rw =3D=3D 2) { /* code access */ rw =3D 0; @@ -2802,9 +2786,15 @@ void helper_booke206_tlbflush(CPUPPCState *env, ui= nt32_t type) void tlb_fill(CPUPPCState *env, target_ulong addr, int is_write, int mmu= _idx, uintptr_t retaddr) { + CPUState *cpu =3D ENV_GET_CPU(env); + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); int ret; =20 - ret =3D cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx); + if (pcc->handle_mmu_fault) { + ret =3D pcc->handle_mmu_fault(env, addr, is_write, mmu_idx); + } else { + ret =3D cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx); + } if (unlikely(ret !=3D 0)) { if (likely(retaddr)) { /* now we have a real cpu fault */ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index b2a76d0..6803ae3 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -25,6 +25,8 @@ #include "sysemu/arch_init.h" #include "sysemu/cpus.h" #include "cpu-models.h" +#include "mmu-hash32.h" +#include "mmu-hash64.h" =20 //#define PPC_DUMP_CPU //#define PPC_DEBUG_SPR @@ -4796,6 +4798,7 @@ POWERPC_FAMILY(601)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000000FD70ULL; pcc->mmu_model =3D POWERPC_MMU_601; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_601; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_601; @@ -4830,7 +4833,7 @@ POWERPC_FAMILY(601v)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000000FD70ULL; pcc->mmu_model =3D POWERPC_MMU_601; - pcc->excp_model =3D POWERPC_EXCP_601; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_601; pcc->flags =3D POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK; @@ -5037,6 +5040,7 @@ POWERPC_FAMILY(604)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000005FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_604; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_604; @@ -5103,6 +5107,7 @@ POWERPC_FAMILY(604E)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000005FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_604; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_604; @@ -5156,6 +5161,7 @@ POWERPC_FAMILY(740)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000005FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_7x0; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; @@ -5217,6 +5223,7 @@ POWERPC_FAMILY(750)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000005FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_7x0; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; @@ -5401,6 +5408,7 @@ POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000005FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_7x0; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; @@ -5466,6 +5474,7 @@ POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000005FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_7x0; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; @@ -5536,6 +5545,7 @@ POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000005FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_7x0; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; @@ -5606,6 +5616,7 @@ POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000005FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_7x0; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_750; @@ -5798,6 +5809,7 @@ POWERPC_FAMILY(7400)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000205FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_74xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_7400; @@ -5864,6 +5876,7 @@ POWERPC_FAMILY(7410)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x000000000205FF77ULL; pcc->mmu_model =3D POWERPC_MMU_32B; + pcc->handle_mmu_fault =3D ppc_hash32_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_74xx; pcc->bus_model =3D PPC_FLAGS_INPUT_6xx; pcc->bfd_mach =3D bfd_mach_ppc_7400; @@ -6570,6 +6583,7 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x900000000204FF36ULL; pcc->mmu_model =3D POWERPC_MMU_64B; + pcc->handle_mmu_fault =3D ppc_hash64_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_970; pcc->bus_model =3D PPC_FLAGS_INPUT_970; pcc->bfd_mach =3D bfd_mach_ppc64; @@ -6680,6 +6694,7 @@ POWERPC_FAMILY(970FX)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x800000000204FF36ULL; pcc->mmu_model =3D POWERPC_MMU_64B; + pcc->handle_mmu_fault =3D ppc_hash64_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_970; pcc->bus_model =3D PPC_FLAGS_INPUT_970; pcc->bfd_mach =3D bfd_mach_ppc64; @@ -6778,6 +6793,7 @@ POWERPC_FAMILY(970GX)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x800000000204FF36ULL; pcc->mmu_model =3D POWERPC_MMU_64B; + pcc->handle_mmu_fault =3D ppc_hash64_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_970; pcc->bus_model =3D PPC_FLAGS_INPUT_970; pcc->bfd_mach =3D bfd_mach_ppc64; @@ -6876,6 +6892,7 @@ POWERPC_FAMILY(970MP)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC_NONE; pcc->msr_mask =3D 0x900000000204FF36ULL; pcc->mmu_model =3D POWERPC_MMU_64B; + pcc->handle_mmu_fault =3D ppc_hash64_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_970; pcc->bus_model =3D PPC_FLAGS_INPUT_970; pcc->bfd_mach =3D bfd_mach_ppc64; @@ -6968,6 +6985,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) pcc->insns_flags2 =3D PPC2_VSX | PPC2_DFP | PPC2_DBRX; pcc->msr_mask =3D 0x800000000204FF36ULL; pcc->mmu_model =3D POWERPC_MMU_2_06; + pcc->handle_mmu_fault =3D ppc_hash64_handle_mmu_fault; pcc->excp_model =3D POWERPC_EXCP_POWER7; pcc->bus_model =3D PPC_FLAGS_INPUT_POWER7; pcc->bfd_mach =3D bfd_mach_ppc64; --=20 1.7.10.4