From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45538) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UHq8p-0005rA-DR for qemu-devel@nongnu.org; Tue, 19 Mar 2013 02:35:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UHq8m-0008US-QR for qemu-devel@nongnu.org; Tue, 19 Mar 2013 02:35:23 -0400 Received: from [222.73.24.84] (port=18817 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UHq8m-0008TX-Eu for qemu-devel@nongnu.org; Tue, 19 Mar 2013 02:35:20 -0400 From: li guang In-Reply-To: <20130110185744.GD21593@dhcp-192-168-178-175.profitbricks.localdomain> References: <1355834518-17989-1-git-send-email-vasilis.liaskovitis@profitbricks.com> <50D16C68.5020800@redhat.com> <20121219113553.GD4682@dhcp-192-168-178-175.profitbricks.localdomain> <20130110185744.GD21593@dhcp-192-168-178-175.profitbricks.localdomain> Date: Tue, 19 Mar 2013 14:30:25 +0800 Message-ID: <1363674625.21129.173.camel@liguang.fnst.cn.fujitsu.com> Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Subject: Re: [Qemu-devel] [RFC PATCH v4 00/30] ACPI memory hotplug List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Vasilis Liaskovitis Cc: gleb@redhat.com, stefanha@gmail.com, jbaron@redhat.com, seabios@seabios.org, qemu-devel@nongnu.org, blauwirbel@gmail.com, kevin@koconnor.net, Gerd Hoffmann , anthony@codemonkey.ws =E5=9C=A8 2013-01-10=E5=9B=9B=E7=9A=84 19:57 +0100=EF=BC=8CVasilis Liaskovi= tis=E5=86=99=E9=81=93=EF=BC=9A > > >=20 > > > IIRC q35 supports memory hotplug natively (picked up in some > > > discussion). Is that correct? > > >=20 > > From previous discussion I also understand that q35 supports native hot= plug.=20 > > Sections 5.1 and 5.2 of the spec describe the MCH registers but the nat= ive > > memory hotplug specifics are not yet clear to me. Any pointers from the > > spec are welcome. >=20 > Ping. Could anyone who's familiar with the q35 spec provide some pointers= on > native memory hotplug details in the spec? I see pcie hotplug registers b= ut can't > find memory hotplug interface details. If I am not mistaken, the spec is = here: > http://www.intel.com/design/chipsets/datashts/316966.htm >=20 > Is the q35 memory hotplug support supposed to be an shpc-like interface g= eared > towards memory slots instead of pci slots? >=20 seems there's no so-called q35-native support