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From: edgar.iglesias@gmail.com
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH v2] microblaze: Add support for the sleep insn
Date: Sat, 30 Mar 2013 15:12:24 +0100	[thread overview]
Message-ID: <1364652744-7001-1-git-send-email-edgar.iglesias@gmail.com> (raw)

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target-microblaze/translate.c |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index a74da8e..06d2346 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1317,6 +1317,23 @@ static void dec_br(DisasContext *dc)
     /* Memory barrier.  */
     mbar = (dc->ir >> 16) & 31;
     if (mbar == 2 && dc->imm == 4) {
+        /* mbar IMM & 16 decodes to sleep.  */
+        if (dc->rd & 16) {
+            TCGv_i32 tmp_hlt = tcg_const_i32(EXCP_HLT);
+            TCGv_i32 tmp_1 = tcg_const_i32(1);
+
+            LOG_DIS("sleep\n");
+
+            t_sync_flags(dc);
+            tcg_gen_st_i32(tmp_1, cpu_env,
+                           -offsetof(MicroBlazeCPU, env)
+                           +offsetof(CPUState, halted));
+            tcg_gen_movi_tl(cpu_SR[SR_PC], dc->pc + 4);
+            gen_helper_raise_exception(cpu_env, tmp_hlt);
+            tcg_temp_free_i32(tmp_hlt);
+            tcg_temp_free_i32(tmp_1);
+            return;
+        }
         LOG_DIS("mbar %d\n", dc->rd);
         /* Break the TB.  */
         dc->cpustate_changed = 1;
-- 
1.7.9.5

                 reply	other threads:[~2013-03-30 14:16 UTC|newest]

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