From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:53429) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UN2Ru-0004dV-Jb for qemu-devel@nongnu.org; Tue, 02 Apr 2013 10:44:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UN2Rq-0002gJ-BH for qemu-devel@nongnu.org; Tue, 02 Apr 2013 10:44:34 -0400 Received: from mail-ee0-f51.google.com ([74.125.83.51]:61508) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UN2Rq-0002ep-3j for qemu-devel@nongnu.org; Tue, 02 Apr 2013 10:44:30 -0400 Received: by mail-ee0-f51.google.com with SMTP id c4so262930eek.38 for ; Tue, 02 Apr 2013 07:44:29 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Tue, 2 Apr 2013 16:44:17 +0200 Message-Id: <1364913860-25159-3-git-send-email-pbonzini@redhat.com> In-Reply-To: <1364913860-25159-1-git-send-email-pbonzini@redhat.com> References: <1364913860-25159-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 2/5] cpu: default TARGET_LONG_ALIGNMENT to TARGET_LONG_SIZE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is the case for all supported 64-bits architectures. Signed-off-by: Paolo Bonzini --- include/exec/cpu-defs.h | 2 +- target-alpha/cpu.h | 1 - target-i386/cpu.h | 1 - target-ppc/cpu.h | 1 - target-s390x/cpu.h | 1 - target-sparc/cpu.h | 1 - 6 files changed, 1 insertion(+), 6 deletions(-) diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 32d11e8..7d23fc2 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -43,7 +43,7 @@ #define TARGET_INT_ALIGNMENT 4 #endif #ifndef TARGET_LONG_ALIGNMENT -#define TARGET_LONG_ALIGNMENT 4 +#define TARGET_LONG_ALIGNMENT TARGET_LONG_SIZE #endif #ifndef TARGET_LLONG_ALIGNMENT #define TARGET_LLONG_ALIGNMENT 8 diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index b0338fb..2156a1e 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -24,7 +24,6 @@ #include "qemu-common.h" #define TARGET_LONG_BITS 64 -#define TARGET_LONG_ALIGNMENT 8 #define CPUArchState struct CPUAlphaState diff --git a/target-i386/cpu.h b/target-i386/cpu.h index f1ef87c..48f41ca 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -24,7 +24,6 @@ #ifdef TARGET_X86_64 #define TARGET_LONG_BITS 64 -#define TARGET_LONG_ALIGNMENT 8 #else #define TARGET_LONG_BITS 32 #endif diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 19d4e4c..42c36e2 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -27,7 +27,6 @@ #if defined (TARGET_PPC64) /* PowerPC 64 definitions */ #define TARGET_LONG_BITS 64 -#define TARGET_LONG_ALIGNMENT 8 #define TARGET_PAGE_BITS 12 /* Note that the official physical address space bits is 62-M where M diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index 8a241d3..e351005 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -26,7 +26,6 @@ #include "qemu-common.h" #define TARGET_LONG_BITS 64 -#define TARGET_LONG_ALIGNMENT 8 #define ELF_MACHINE EM_S390 diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 9e5941a..6fa7778 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -13,7 +13,6 @@ #define TARGET_VIRT_ADDR_SPACE_BITS 32 #else #define TARGET_LONG_BITS 64 -#define TARGET_LONG_ALIGNMENT 8 #define TARGET_DPREGS 32 #define TARGET_PAGE_BITS 13 /* 8k */ #define TARGET_PHYS_ADDR_SPACE_BITS 41 -- 1.8.1.4