From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:47543) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNt5v-0005zD-JV for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UNt5n-0001Ll-F4 for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:23 -0400 Received: from mail-oa0-f54.google.com ([209.85.219.54]:46295) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNt5n-0001Le-BD for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:15 -0400 Received: by mail-oa0-f54.google.com with SMTP id n12so3384074oag.41 for ; Thu, 04 Apr 2013 15:57:14 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 4 Apr 2013 17:56:09 -0500 Message-Id: <1365116186-19382-17-git-send-email-rth@twiddle.net> In-Reply-To: <1365116186-19382-1-git-send-email-rth@twiddle.net> References: <1365116186-19382-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v4 16/33] tcg-ppc64: Use automatic implementation of ext32u_i64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: av1474@comtv.ru, Aurelien Jarno The enhancements to and immediate obviate this. Signed-off-by: Richard Henderson --- tcg/ppc64/tcg-target.c | 5 ----- tcg/ppc64/tcg-target.h | 6 +++--- 2 files changed, 3 insertions(+), 8 deletions(-) diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 1bd456a..71d72b4 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -1686,10 +1686,6 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_out32 (s, c | RS (args[1]) | RA (args[0])); break; - case INDEX_op_ext32u_i64: - tcg_out_ext32u(s, args[0], args[1]); - break; - case INDEX_op_setcond_i32: tcg_out_setcond (s, TCG_TYPE_I32, args[3], args[0], args[1], args[2], const_args[2]); @@ -1796,7 +1792,6 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_ext8s_i64, { "r", "r" } }, { INDEX_op_ext16s_i64, { "r", "r" } }, { INDEX_op_ext32s_i64, { "r", "r" } }, - { INDEX_op_ext32u_i64, { "r", "r" } }, { INDEX_op_setcond_i32, { "r", "r", "ri" } }, { INDEX_op_setcond_i64, { "r", "r", "ri" } }, diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h index f1c3067..a4078ae 100644 --- a/tcg/ppc64/tcg-target.h +++ b/tcg/ppc64/tcg-target.h @@ -70,6 +70,9 @@ typedef enum { /* optional instructions automatically implemented */ #define TCG_TARGET_HAS_ext8u_i32 0 /* andi */ #define TCG_TARGET_HAS_ext16u_i32 0 +#define TCG_TARGET_HAS_ext8u_i64 0 +#define TCG_TARGET_HAS_ext16u_i64 0 +#define TCG_TARGET_HAS_ext32u_i64 0 /* optional instructions */ #define TCG_TARGET_HAS_div_i32 1 @@ -97,9 +100,6 @@ typedef enum { #define TCG_TARGET_HAS_ext8s_i64 1 #define TCG_TARGET_HAS_ext16s_i64 1 #define TCG_TARGET_HAS_ext32s_i64 1 -#define TCG_TARGET_HAS_ext8u_i64 0 -#define TCG_TARGET_HAS_ext16u_i64 0 -#define TCG_TARGET_HAS_ext32u_i64 1 #define TCG_TARGET_HAS_bswap16_i64 0 #define TCG_TARGET_HAS_bswap32_i64 0 #define TCG_TARGET_HAS_bswap64_i64 0 -- 1.8.1.4