From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: av1474@comtv.ru, Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v4 29/33] tcg-ppc64: Implement movcond
Date: Thu, 4 Apr 2013 17:56:22 -0500 [thread overview]
Message-ID: <1365116186-19382-30-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1365116186-19382-1-git-send-email-rth@twiddle.net>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/ppc64/tcg-target.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++++++
tcg/ppc64/tcg-target.h | 4 ++--
2 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 27a7ff2..faf110f 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -1321,6 +1321,54 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond,
tcg_out_bc(s, tcg_to_bc[cond], label_index);
}
+static void tcg_out_movcond(TCGContext *s, TCGType type, TCGCond cond,
+ TCGArg dest, TCGArg c1, TCGArg c2, TCGArg v1,
+ TCGArg v2, bool const_c2)
+{
+ /* If for some reason both inputs are zero, don't produce bad code. */
+ if (v1 == 0 && v2 == 0) {
+ tcg_out_movi(s, type, dest, 0);
+ return;
+ }
+
+ tcg_out_cmp(s, cond, c1, c2, const_c2, 7, type);
+
+ if (HAVE_ISEL) {
+ int isel = tcg_to_isel[cond];
+
+ /* Swap the V operands if the operation indicates inversion. */
+ if (isel & 1) {
+ int t = v1;
+ v1 = v2;
+ v2 = t;
+ isel &= ~1;
+ }
+ /* V1 == 0 is handled by isel; V2 == 0 must be handled by hand. */
+ if (v2 == 0) {
+ tcg_out_movi(s, type, 0, 0);
+ }
+ tcg_out32(s, isel | TAB(dest, v1, v2));
+ } else {
+ if (dest == v2) {
+ cond = tcg_invert_cond(cond);
+ v2 = v1;
+ } else if (dest != v1) {
+ if (v1 == 0) {
+ tcg_out_movi(s, type, dest, 0);
+ } else {
+ tcg_out_mov(s, type, dest, v1);
+ }
+ }
+ /* Branch forward over one insn */
+ tcg_out32(s, tcg_to_bc[cond] | 8);
+ if (v2 == 0) {
+ tcg_out_movi(s, type, dest, 0);
+ } else {
+ tcg_out_mov(s, type, dest, v2);
+ }
+ }
+}
+
void ppc_tb_set_jmp_target (unsigned long jmp_addr, unsigned long addr)
{
TCGContext s;
@@ -1871,6 +1919,15 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args,
64 - args[3] - args[4]);
break;
+ case INDEX_op_movcond_i32:
+ tcg_out_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1], args[2],
+ args[3], args[4], const_args[2]);
+ break;
+ case INDEX_op_movcond_i64:
+ tcg_out_movcond(s, TCG_TYPE_I64, args[5], args[0], args[1], args[2],
+ args[3], args[4], const_args[2]);
+ break;
+
default:
tcg_dump_ops (s);
tcg_abort ();
@@ -1985,6 +2042,8 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_setcond_i32, { "r", "r", "ri" } },
{ INDEX_op_setcond_i64, { "r", "r", "ri" } },
+ { INDEX_op_movcond_i32, { "r", "r", "ri", "rZ", "rZ" } },
+ { INDEX_op_movcond_i64, { "r", "r", "ri", "rZ", "rZ" } },
{ INDEX_op_bswap16_i32, { "r", "r" } },
{ INDEX_op_bswap16_i64, { "r", "r" } },
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index 7ffa895..67313b9 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -89,7 +89,7 @@ typedef enum {
#define TCG_TARGET_HAS_nand_i32 1
#define TCG_TARGET_HAS_nor_i32 1
#define TCG_TARGET_HAS_deposit_i32 1
-#define TCG_TARGET_HAS_movcond_i32 0
+#define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_add2_i32 0
#define TCG_TARGET_HAS_sub2_i32 0
#define TCG_TARGET_HAS_mulu2_i32 0
@@ -111,7 +111,7 @@ typedef enum {
#define TCG_TARGET_HAS_nand_i64 1
#define TCG_TARGET_HAS_nor_i64 1
#define TCG_TARGET_HAS_deposit_i64 1
-#define TCG_TARGET_HAS_movcond_i64 0
+#define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_add2_i64 0
#define TCG_TARGET_HAS_sub2_i64 0
#define TCG_TARGET_HAS_mulu2_i64 0
--
1.8.1.4
next prev parent reply other threads:[~2013-04-04 22:57 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-04 22:55 [Qemu-devel] [PATCH v4 00/33] Modernize tcg/ppc64 Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 01/33] disas: Disassemble all ppc insns for the host Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 02/33] tcg-ppc64: Use TCGReg everywhere Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 03/33] tcg-ppc64: Introduce and use tcg_out_rlw Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 04/33] tcg-ppc64: Introduce and use tcg_out_ext32u Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 05/33] tcg-ppc64: Introduce and use tcg_out_shli64 Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 06/33] tcg-ppc64: Introduce and use tcg_out_shri64 Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 07/33] tcg-ppc64: Introduce and use TAI and SAI Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 08/33] tcg-ppc64: Fix setcond_i32 Richard Henderson
2013-04-15 7:54 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 09/33] tcg-ppc64: Cleanup tcg_out_movi Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 10/33] tcg-ppc64: Rearrange integer constant constraints Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 11/33] tcg-ppc64: Improve constant add and sub ops Richard Henderson
2013-04-15 7:54 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 12/33] tcg-ppc64: Allow constant first argument to sub Richard Henderson
2013-04-15 7:59 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 13/33] tcg-ppc64: Tidy or and xor patterns Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 14/33] tcg-ppc64: Improve and_i32 with constant Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 15/33] tcg-ppc64: Improve and_i64 " Richard Henderson
2013-04-13 12:24 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 16/33] tcg-ppc64: Use automatic implementation of ext32u_i64 Richard Henderson
2013-04-13 12:25 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 17/33] tcg-ppc64: Streamline qemu_ld/st insn selection Richard Henderson
2013-04-13 12:25 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 18/33] tcg-ppc64: Implement rotates Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 19/33] tcg-ppc64: Implement bswap16 and bswap32 Richard Henderson
2013-04-15 7:59 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 20/33] tcg-ppc64: Implement bswap64 Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 21/33] tcg-ppc64: Implement compound logicals Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 22/33] tcg-ppc64: Handle constant inputs for some " Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 23/33] tcg-ppc64: Implement deposit Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 24/33] tcg-ppc64: Use I constraint for mul Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 25/33] tcg-ppc64: Cleanup i32 constants to tcg_out_cmp Richard Henderson
2013-04-15 8:01 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 26/33] tcg-ppc64: Use TCGType throughout compares Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 27/33] tcg-ppc64: Use MFOCRF instead of MFCR Richard Henderson
2013-04-15 8:02 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 28/33] tcg-ppc64: Use ISEL for setcond Richard Henderson
2013-04-15 8:13 ` Aurelien Jarno
2013-04-04 22:56 ` Richard Henderson [this message]
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 30/33] tcg-ppc64: Use getauxval for ISA detection Richard Henderson
2013-04-05 16:59 ` Richard Henderson
2013-04-15 8:13 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 31/33] tcg-ppc64: Implement add2/sub2_i64 Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 32/33] tcg-ppc64: Implement mulu2/muls2_i64 Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 33/33] tcg-ppc64: Handle deposit of zero Richard Henderson
2013-04-15 8:14 ` Aurelien Jarno
2013-04-13 12:24 ` [Qemu-devel] [PATCH v4 00/33] Modernize tcg/ppc64 Aurelien Jarno
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