From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:47411) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNt5h-0005aq-F6 for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UNt5a-0001He-0z for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:09 -0400 Received: from mail-oa0-f46.google.com ([209.85.219.46]:60191) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNt5Z-0001HS-RS for qemu-devel@nongnu.org; Thu, 04 Apr 2013 18:57:01 -0400 Received: by mail-oa0-f46.google.com with SMTP id k1so3412739oag.5 for ; Thu, 04 Apr 2013 15:57:01 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 4 Apr 2013 17:56:01 -0500 Message-Id: <1365116186-19382-9-git-send-email-rth@twiddle.net> In-Reply-To: <1365116186-19382-1-git-send-email-rth@twiddle.net> References: <1365116186-19382-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v4 08/33] tcg-ppc64: Fix setcond_i32 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: av1474@comtv.ru, Aurelien Jarno We weren't ignoring the high 32 bits during a NE comparison. Signed-off-by: Richard Henderson --- tcg/ppc64/tcg-target.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index b12cbec..822eb07 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -1129,6 +1129,12 @@ static void tcg_out_setcond (TCGContext *s, TCGType type, TCGCond cond, tcg_out32 (s, XOR | SAB (arg1, 0, arg2)); } + /* Make sure and discard the high 32-bits of the input. */ + if (type == TCG_TYPE_I32) { + tcg_out32(s, EXTSW | RA(TCG_REG_R0) | RS(arg)); + arg = TCG_REG_R0; + } + if (arg == arg1 && arg1 == arg0) { tcg_out32(s, ADDIC | TAI(0, arg, -1)); tcg_out32(s, SUBFE | TAB(arg0, 0, arg)); -- 1.8.1.4