From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36291) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UOAeo-0007Lk-8A for qemu-devel@nongnu.org; Fri, 05 Apr 2013 13:42:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UOAei-0005Fd-Lz for qemu-devel@nongnu.org; Fri, 05 Apr 2013 13:42:34 -0400 Received: from 1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa ([2001:8b0:1d0::1]:33552 helo=mnementh.archaic.org.uk) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UOAei-0005Er-CE for qemu-devel@nongnu.org; Fri, 05 Apr 2013 13:42:28 -0400 From: Peter Maydell Date: Fri, 5 Apr 2013 18:13:19 +0100 Message-Id: <1365181999-15387-15-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1365181999-15387-1-git-send-email-peter.maydell@linaro.org> References: <1365181999-15387-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 14/14] hw/nand.c: Fix nand erase operation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori , Blue Swirl Cc: qemu-devel@nongnu.org, Paul Brook From: Wendy Liang Usually, nand erase operation has only 2 or 3 address cycles. We need to mask s->addr to zero unset stale high-order bytes in the nand address before using it as the erase address. This fixes the NAND erase operation in Linux. [PC: Generalised to work for any number of address cycles rather than just 3] Signed-off-by: Wendy Liang Signed-off-by: Peter Crosthwaite Message-id: 1364967188-26711-1-git-send-email-peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- hw/nand.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/nand.c b/hw/nand.c index de3e502..6362093 100644 --- a/hw/nand.c +++ b/hw/nand.c @@ -297,6 +297,7 @@ static void nand_command(NANDFlashState *s) break; case NAND_CMD_BLOCKERASE2: + s->addr &= (1ull << s->addrlen * 8) - 1; if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) s->addr <<= 16; else -- 1.7.9.5