From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:40858) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UPb4h-0005VP-BU for qemu-devel@nongnu.org; Tue, 09 Apr 2013 12:07:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UPb4c-0004Kz-KG for qemu-devel@nongnu.org; Tue, 09 Apr 2013 12:07:11 -0400 Received: from mel.act-europe.fr ([194.98.77.210]:58708) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UPb4c-0004Ko-BP for qemu-devel@nongnu.org; Tue, 09 Apr 2013 12:07:06 -0400 From: Fabien Chouteau Date: Tue, 9 Apr 2013 18:06:54 +0200 Message-Id: <1365523615-5177-3-git-send-email-chouteau@adacore.com> In-Reply-To: <1365523615-5177-1-git-send-email-chouteau@adacore.com> References: <1365523615-5177-1-git-send-email-chouteau@adacore.com> Subject: [Qemu-devel] [PATCH 2/3] Ensure good ordering of memory instruction in cpu_exec List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: hainque@adacore.com, peter.maydell@linaro.org, sw@weilnetz.de, blauwirbel@gmail.com, pbonzini@redhat.com, afaerber@suse.de From: Olivier Hainque The IO thread, when it senses cpu_single_env == 0, expects exit_request to be checked later on. A compiler scheduling constraint is not strong enough to ensure this on modern architecture. A memory fence is needed as well. Signed-off-by: Fabien Chouteau --- cpu-exec.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/cpu-exec.c b/cpu-exec.c index e74e556..aa8fa89 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -217,6 +217,14 @@ int cpu_exec(CPUArchState *env) cpu_single_env = env; + /* As long as cpu_single_env is null, up to the assignment just above, + * requests by other threads to exit the execution loop are expected to + * be issued using the exit_request global. We must make sure that our + * evaluation of the global value is performed past the cpu_single_env + * value transition point, which requires a memory barrier as well as + * an instruction scheduling constraint on modern architectures. */ + smp_mb(); + if (unlikely(exit_request)) { cpu->exit_request = 1; } -- 1.7.9.5