From: Igor Mammedov <imammedo@redhat.com>
To: qemu-devel@nongnu.org
Cc: aliguori@us.ibm.com, ehabkost@redhat.com, mst@redhat.com,
jan.kiszka@siemens.com, claudio.fontana@huawei.com,
aderumier@odiso.com, lcapitulino@redhat.com,
jfrei@linux.vnet.ibm.com, yang.z.zhang@intel.com,
pbonzini@redhat.com, afaerber@suse.de, lig.fnst@cn.fujitsu.com,
rth@twiddle.net
Subject: [Qemu-devel] [PATCH 14/16] target-i386: move APIC to ICC bus
Date: Tue, 16 Apr 2013 00:12:54 +0200 [thread overview]
Message-ID: <1366063976-4909-15-git-send-email-imammedo@redhat.com> (raw)
In-Reply-To: <1366063976-4909-1-git-send-email-imammedo@redhat.com>
... to allow it to be hotplugged
* map APIC's mmio at board level if it is present
* do not register mmio region for each APIC, since
only one is used/mapped
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/cpu/icc_bus.c | 15 ++++++++++++++-
hw/i386/kvmvapic.c | 1 +
hw/i386/pc.c | 20 +++++++++++++++++---
hw/intc/apic_common.c | 17 ++++++++++++-----
include/hw/i386/apic_internal.h | 6 +++---
include/hw/i386/icc_bus.h | 2 ++
target-i386/cpu.c | 16 +++-------------
7 files changed, 52 insertions(+), 25 deletions(-)
diff --git a/hw/cpu/icc_bus.c b/hw/cpu/icc_bus.c
index 00b9be3..5078c38 100644
--- a/hw/cpu/icc_bus.c
+++ b/hw/cpu/icc_bus.c
@@ -62,13 +62,26 @@ static const TypeInfo icc_device_info = {
typedef struct ICCBridgeState {
SysBusDevice busdev;
+ MemoryRegion apic_container;
} ICCBridgeState;
#define ICC_BRIGDE(obj) OBJECT_CHECK(ICCBridgeState, (obj), TYPE_ICC_BRIDGE)
static void icc_bridge_initfn(Object *obj)
{
- qbus_create(TYPE_ICC_BUS, DEVICE(obj), "icc-bus");
+ ICCBridgeState *s = ICC_BRIGDE(obj);
+ SysBusDevice *sb = SYS_BUS_DEVICE(obj);
+ ICCBus *ibus;
+
+ ibus = ICC_BUS(qbus_create(TYPE_ICC_BUS, DEVICE(obj), "icc-bus"));
+
+ /* Do not change order of registering regions,
+ * APIC must be first registered region, board maps it by 0 index
+ */
+ memory_region_init(&s->apic_container, "icc-apic-container",
+ APIC_SPACE_SIZE);
+ sysbus_init_mmio(sb, &s->apic_container);
+ ibus->apic_address_space = &s->apic_container;
}
static const TypeInfo icc_bridge_info = {
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 3a10c07..5b558aa 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -12,6 +12,7 @@
#include "sysemu/cpus.h"
#include "sysemu/kvm.h"
#include "hw/i386/apic_internal.h"
+#include "hw/sysbus.h"
#define VAPIC_IO_PORT 0x7e
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index cb57878..31b5294 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -52,6 +52,7 @@
#include "sysemu/arch_init.h"
#include "qemu/bitmap.h"
#include "qemu/config-file.h"
+#include "hw/i386/icc_bus.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
@@ -889,13 +890,13 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
}
}
-static void pc_new_cpu(const char *cpu_model, int64_t apic_id, Error **errp)
+static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id, Error **errp)
{
X86CPU *cpu;
cpu = cpu_x86_create(cpu_model, errp);
if (!cpu) {
- return;
+ return cpu;
}
object_property_set_int(OBJECT(cpu), apic_id, "apic-id", errp);
@@ -904,14 +905,18 @@ static void pc_new_cpu(const char *cpu_model, int64_t apic_id, Error **errp)
if (error_is_set(errp)) {
if (cpu != NULL) {
object_unref(OBJECT(cpu));
+ cpu = NULL;
}
}
+ return cpu;
}
void pc_cpus_init(const char *cpu_model)
{
int i;
+ X86CPU *cpu = NULL;
Error *error = NULL;
+ SysBusDevice *ib;
/* init CPUs */
if (cpu_model == NULL) {
@@ -922,14 +927,23 @@ void pc_cpus_init(const char *cpu_model)
#endif
}
+ ib = SYS_BUS_DEVICE(object_resolve_path_type("icc-bridge",
+ TYPE_ICC_BRIDGE, NULL));
+
for (i = 0; i < smp_cpus; i++) {
- pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), &error);
+ cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), &error);
if (error) {
fprintf(stderr, "%s\n", error_get_pretty(error));
error_free(error);
exit(1);
}
}
+
+ /* map APIC MMIO area if CPU has APIC */
+ if (cpu && cpu->env.apic_state) {
+ /* XXX: what if the base changes? */
+ sysbus_mmio_map_overlap(ib, 0, APIC_DEFAULT_ADDRESS, 0x1000);
+ }
}
void pc_acpi_init(const char *default_dsdt)
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index e0ae07a..39396f1 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -21,6 +21,8 @@
#include "hw/i386/apic_internal.h"
#include "trace.h"
#include "sysemu/kvm.h"
+#include "hw/qdev.h"
+#include "hw/sysbus.h"
static int apic_irq_delivered;
bool apic_report_tpr_access;
@@ -282,12 +284,14 @@ static int apic_load_old(QEMUFile *f, void *opaque, int version_id)
return 0;
}
-static int apic_init_common(SysBusDevice *dev)
+static int apic_init_common(ICCDevice *dev)
{
APICCommonState *s = APIC_COMMON(dev);
+ DeviceState *d = DEVICE(dev);
APICCommonClass *info;
static DeviceState *vapic;
static int apic_no;
+ static bool mmio_registered;
if (apic_no >= MAX_APICS) {
return -1;
@@ -296,8 +300,11 @@ static int apic_init_common(SysBusDevice *dev)
info = APIC_COMMON_GET_CLASS(s);
info->init(s);
-
- sysbus_init_mmio(dev, &s->io_memory);
+ if (!mmio_registered) {
+ MemoryRegion *as = ICC_BUS(d->parent_bus)->apic_address_space;
+ memory_region_add_subregion(as, 0, &s->io_memory);
+ mmio_registered = true;
+ }
/* Note: We need at least 1M to map the VAPIC option ROM */
if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK &&
@@ -375,7 +382,7 @@ static Property apic_properties_common[] = {
static void apic_common_class_init(ObjectClass *klass, void *data)
{
- SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass);
+ ICCDeviceClass *sc = ICC_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_apic_common;
@@ -387,7 +394,7 @@ static void apic_common_class_init(ObjectClass *klass, void *data)
static const TypeInfo apic_common_type = {
.name = TYPE_APIC_COMMON,
- .parent = TYPE_SYS_BUS_DEVICE,
+ .parent = TYPE_ICC_DEVICE,
.instance_size = sizeof(APICCommonState),
.class_size = sizeof(APICCommonClass),
.class_init = apic_common_class_init,
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index aac6290..05acf4b 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -21,7 +21,7 @@
#define QEMU_APIC_INTERNAL_H
#include "exec/memory.h"
-#include "hw/sysbus.h"
+#include "hw/i386/icc_bus.h"
#include "qemu/timer.h"
/* APIC Local Vector Table */
@@ -78,7 +78,7 @@ typedef struct APICCommonState APICCommonState;
typedef struct APICCommonClass
{
- SysBusDeviceClass parent_class;
+ ICCDeviceClass parent_class;
void (*init)(APICCommonState *s);
void (*set_base)(APICCommonState *s, uint64_t val);
@@ -92,7 +92,7 @@ typedef struct APICCommonClass
} APICCommonClass;
struct APICCommonState {
- SysBusDevice busdev;
+ ICCDevice busdev;
MemoryRegion io_memory;
X86CPU *cpu;
diff --git a/include/hw/i386/icc_bus.h b/include/hw/i386/icc_bus.h
index aa30e0c..1b07619 100644
--- a/include/hw/i386/icc_bus.h
+++ b/include/hw/i386/icc_bus.h
@@ -22,6 +22,7 @@
#ifndef ICC_BUS_H
#define ICC_BUS_H
+#include "exec/memory.h"
#include "hw/qdev-core.h"
#define TYPE_ICC_BUS "icc-bus"
@@ -29,6 +30,7 @@
#ifndef CONFIG_USER_ONLY
typedef struct ICCBus {
BusState qbus;
+ MemoryRegion *apic_address_space;
} ICCBus;
#define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 3b5f90b..bdac6ea 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -41,10 +41,10 @@
#endif
#include "sysemu/sysemu.h"
+#include "hw/qdev-properties.h"
#include "hw/i386/icc_bus.h"
#ifndef CONFIG_USER_ONLY
#include "hw/xen/xen.h"
-#include "hw/sysbus.h"
#include "hw/i386/apic_internal.h"
#endif
@@ -2111,6 +2111,7 @@ static void mce_init(X86CPU *cpu)
static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
{
CPUX86State *env = &cpu->env;
+ DeviceState *dev = DEVICE(cpu);
APICCommonState *apic;
const char *apic_type = "apic";
@@ -2120,7 +2121,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
apic_type = "xen-apic";
}
- env->apic_state = qdev_try_create(NULL, apic_type);
+ env->apic_state = qdev_try_create(dev->parent_bus, apic_type);
if (env->apic_state == NULL) {
error_setg(errp, "APIC device '%s' could not be created", apic_type);
return;
@@ -2137,7 +2138,6 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
{
CPUX86State *env = &cpu->env;
- static int apic_mapped;
if (env->apic_state == NULL) {
return;
@@ -2148,16 +2148,6 @@ static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
object_get_typename(OBJECT(env->apic_state)));
return;
}
-
- /* XXX: mapping more APICs at the same memory location */
- if (apic_mapped == 0) {
- /* NOTE: the APIC is directly connected to the CPU - it is not
- on the global memory bus. */
- /* XXX: what if the base changes? */
- sysbus_mmio_map_overlap(SYS_BUS_DEVICE(env->apic_state), 0,
- APIC_DEFAULT_ADDRESS, 0x1000);
- apic_mapped = 1;
- }
}
#else
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
--
1.8.2
next prev parent reply other threads:[~2013-04-15 22:14 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-15 22:12 [Qemu-devel] [PATCH 00/16 v4] target-i386: CPU hot-add with cpu-add QMP command Igor Mammedov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 01/16] cpu: make kvm-stub.o a part of CPU library Igor Mammedov
[not found] ` <20130417185844.GA11821@otherpad.lan.raisama.net>
2013-04-17 22:26 ` Paolo Bonzini
2013-04-18 4:23 ` [Qemu-devel] [PATCH 01/16 v2] " Igor Mammedov
2013-04-18 14:24 ` Eduardo Habkost
2013-04-22 13:45 ` Andreas Färber
2013-04-22 14:35 ` Paolo Bonzini
2013-04-22 16:29 ` Gleb Natapov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 02/16] cpu: call cpu_synchronize_post_init() from CPUClass.realize() if hotplugged Igor Mammedov
2013-04-18 17:03 ` Eduardo Habkost
2013-04-22 13:46 ` Andreas Färber
2013-04-22 16:30 ` Gleb Natapov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 03/16] introduce resume_vcpu(), for single CPU Igor Mammedov
2013-04-18 17:04 ` Eduardo Habkost
2013-04-22 10:40 ` Gleb Natapov
2013-04-22 10:54 ` Igor Mammedov
2013-04-22 10:59 ` Gleb Natapov
2013-04-22 11:45 ` Igor Mammedov
2013-04-22 12:34 ` Gleb Natapov
2013-04-22 13:42 ` Andreas Färber
2013-04-22 14:50 ` Igor Mammedov
2013-04-22 14:59 ` Andreas Färber
2013-04-15 22:12 ` [Qemu-devel] [PATCH 04/16] cpu: resume CPU from CPUClass.cpu_common_realizefn() when it is hot-plugged Igor Mammedov
2013-04-18 17:04 ` Eduardo Habkost
2013-04-15 22:12 ` [Qemu-devel] [PATCH 05/16] introduce CPU hot-plug notifier Igor Mammedov
2013-04-22 11:00 ` Gleb Natapov
2013-04-22 11:09 ` Igor Mammedov
2013-04-22 11:24 ` Gleb Natapov
2013-04-22 20:01 ` Igor Mammedov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 06/16] target-i386: pc: update rtc_cmos on CPU hot-plug Igor Mammedov
2013-04-18 17:09 ` Eduardo Habkost
2013-04-22 14:56 ` Andreas Färber
2013-04-22 15:18 ` Igor Mammedov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 07/16] cpu: introduce get_arch_id() method and override it for target-i386 Igor Mammedov
2013-04-18 17:10 ` Eduardo Habkost
2013-04-19 0:05 ` li guang
2013-04-22 9:42 ` Michael S. Tsirkin
2013-04-22 16:33 ` Andreas Färber
2013-04-22 19:10 ` Igor Mammedov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 08/16] cpu: add helper cpu_exists(), to check if CPU with specified id exists Igor Mammedov
2013-04-22 10:28 ` Michael S. Tsirkin
2013-04-22 10:45 ` Igor Mammedov
2013-04-22 11:15 ` Andreas Färber
2013-04-15 22:12 ` [Qemu-devel] [PATCH 09/16] acpi_piix4: add infrastructure to send CPU hot-plug GPE to guest Igor Mammedov
2013-04-22 9:55 ` Michael S. Tsirkin
2013-04-15 22:12 ` [Qemu-devel] [PATCH 10/16] target-i386: introduce apic-id property Igor Mammedov
2013-04-22 9:49 ` Michael S. Tsirkin
2013-04-22 14:05 ` Andreas Färber
2013-04-22 16:30 ` Igor Mammedov
2013-04-26 16:35 ` Andreas Färber
2013-04-15 22:12 ` [Qemu-devel] [PATCH 11/16] introduce ICC bus/device/bridge Igor Mammedov
2013-04-22 11:39 ` Peter Maydell
2013-04-22 12:27 ` Paolo Bonzini
2013-04-22 13:22 ` Andreas Färber
2013-04-22 15:08 ` Igor Mammedov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 12/16] target-i386: cpu: attach ICC bus to CPU on its creation Igor Mammedov
2013-04-22 15:02 ` Andreas Färber
2013-04-22 15:20 ` Igor Mammedov
2013-04-22 15:27 ` Andreas Färber
2013-04-22 19:14 ` Igor Mammedov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 13/16] target-i386: replace MSI_SPACE_SIZE with APIC_SPACE_SIZE Igor Mammedov
2013-04-22 15:03 ` Andreas Färber
2013-04-15 22:12 ` Igor Mammedov [this message]
2013-04-22 15:18 ` [Qemu-devel] [PATCH 14/16] target-i386: move APIC to ICC bus Andreas Färber
2013-04-22 15:59 ` Igor Mammedov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 15/16] target-i386: move IOAPIC " Igor Mammedov
2013-04-15 22:12 ` [Qemu-devel] [PATCH 16/16] add cpu-add qmp command and implement CPU hot-add for target-i386 Igor Mammedov
2013-04-15 22:20 ` Eric Blake
2013-04-16 20:04 ` Igor Mammedov
2013-04-23 16:17 ` Eric Blake
2013-04-16 8:30 ` [Qemu-devel] [PATCH 00/16 v4] target-i386: CPU hot-add with cpu-add QMP command Jan Kiszka
2013-04-16 9:43 ` Igor Mammedov
2013-04-16 13:49 ` Eduardo Habkost
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1366063976-4909-15-git-send-email-imammedo@redhat.com \
--to=imammedo@redhat.com \
--cc=aderumier@odiso.com \
--cc=afaerber@suse.de \
--cc=aliguori@us.ibm.com \
--cc=claudio.fontana@huawei.com \
--cc=ehabkost@redhat.com \
--cc=jan.kiszka@siemens.com \
--cc=jfrei@linux.vnet.ibm.com \
--cc=lcapitulino@redhat.com \
--cc=lig.fnst@cn.fujitsu.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=yang.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).