From: Peter Maydell <peter.maydell@linaro.org>
To: Aurelien Jarno <aurelien@aurel32.net>, Blue Swirl <blauwirbel@gmail.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>,
qemu-devel@nongnu.org, Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PATCH 1/4] target-arm: Reinsert missing return statement in ARM mode SRS decode
Date: Fri, 19 Apr 2013 16:06:57 +0100 [thread overview]
Message-ID: <1366384020-13253-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1366384020-13253-1-git-send-email-peter.maydell@linaro.org>
From: Peter Chubb <peter.chubb@nicta.com.au>
Since patch
81465888c5306cd94abb9847e560796fd13d3c2f
target-arm: factor out handling of SRS instruction
the ARM mode SRS instruction has not worked in QEMU.
The problem is a missing return directive that was removed in the
refactoring, so after decoding the instruction, qemu would fall through
to generate an UNDEF exception for an illegal instruction.
Signed-off-by: Peter Chubb <peter.chubb@nicta.com.au>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 35a21be..a1b7b8c 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6762,6 +6762,7 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
}
ARCH(6);
gen_srs(s, (insn & 0x1f), (insn >> 23) & 3, insn & (1 << 21));
+ return;
} else if ((insn & 0x0e50ffe0) == 0x08100a00) {
/* rfe */
int32_t offset;
--
1.7.9.5
next prev parent reply other threads:[~2013-04-19 15:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-19 15:06 [Qemu-devel] [PULL 0/4] target-arm queue Peter Maydell
2013-04-19 15:06 ` Peter Maydell [this message]
2013-04-19 15:06 ` [Qemu-devel] [PATCH 2/4] target-arm: port ARM CPU save/load to use VMState Peter Maydell
2013-04-19 15:06 ` [Qemu-devel] [PATCH 3/4] target-arm: Add some missing CPU state fields to VMState Peter Maydell
2013-04-19 15:07 ` [Qemu-devel] [PATCH 4/4] target-arm: Correctly restore FPSCR Peter Maydell
2013-04-20 12:38 ` [Qemu-devel] [PULL 0/4] target-arm queue Blue Swirl
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