From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:47333) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UULyl-0005WG-3N for qemu-devel@nongnu.org; Mon, 22 Apr 2013 15:00:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UULyj-0002Ju-OQ for qemu-devel@nongnu.org; Mon, 22 Apr 2013 15:00:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35996) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UULyj-0002Ji-FZ for qemu-devel@nongnu.org; Mon, 22 Apr 2013 15:00:41 -0400 From: Eduardo Habkost Date: Mon, 22 Apr 2013 16:00:12 -0300 Message-Id: <1366657220-776-2-git-send-email-ehabkost@redhat.com> In-Reply-To: <1366657220-776-1-git-send-email-ehabkost@redhat.com> References: <1366657220-776-1-git-send-email-ehabkost@redhat.com> Subject: [Qemu-devel] [PATCH qom-cpu 1/9] target-i386: cleanup: Group together level, xlevel, xlevel2 fields List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= Cc: libvir-list@redhat.com, Igor Mammedov , Jiri Denemark Consolidate level, xlevel, xlevel2 fields in x86_def_t and CPUX86State. Signed-off-by: Eduardo Habkost Reviewed-By: Igor Mammedov --- Changes v9: * Merged "target-i386: Move cpuid_xlevel, cpuid_xlevel2 fields in X86CPU" and "target-i386: Move xlevel/xlevel2 in struct x86_def_t" in a single patch --- target-i386/cpu.c | 4 ++-- target-i386/cpu.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index e2302d8..732cafd 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -349,6 +349,8 @@ static void add_flagname_to_bitmaps(const char *flagname, typedef struct x86_def_t { const char *name; uint32_t level; + uint32_t xlevel; + uint32_t xlevel2; /* vendor is zero-terminated, 12 character ASCII string */ char vendor[CPUID_VENDOR_SZ + 1]; int family; @@ -356,11 +358,9 @@ typedef struct x86_def_t { int stepping; uint32_t features, ext_features, ext2_features, ext3_features; uint32_t kvm_features, svm_features; - uint32_t xlevel; char model_id[48]; /* Store the results of Centaur's CPUID instructions */ uint32_t ext4_features; - uint32_t xlevel2; /* The feature bits on CPUID[EAX=7,ECX=0].EBX */ uint32_t cpuid_7_0_ebx_features; } x86_def_t; diff --git a/target-i386/cpu.h b/target-i386/cpu.h index a1614e8..c621359 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -836,19 +836,19 @@ typedef struct CPUX86State { /* processor features (e.g. for CPUID insn) */ uint32_t cpuid_level; + uint32_t cpuid_xlevel; + uint32_t cpuid_xlevel2; uint32_t cpuid_vendor1; uint32_t cpuid_vendor2; uint32_t cpuid_vendor3; uint32_t cpuid_version; uint32_t cpuid_features; uint32_t cpuid_ext_features; - uint32_t cpuid_xlevel; uint32_t cpuid_model[12]; uint32_t cpuid_ext2_features; uint32_t cpuid_ext3_features; uint32_t cpuid_apic_id; /* Store the results of Centaur's CPUID instructions */ - uint32_t cpuid_xlevel2; uint32_t cpuid_ext4_features; /* Flags from CPUID[EAX=7,ECX=0].EBX */ uint32_t cpuid_7_0_ebx_features; -- 1.8.1.4