From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34290) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UVR8l-00058A-4M for qemu-devel@nongnu.org; Thu, 25 Apr 2013 14:43:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UVR8j-0001sl-TS for qemu-devel@nongnu.org; Thu, 25 Apr 2013 14:43:31 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32466) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UVR8j-0001sb-KO for qemu-devel@nongnu.org; Thu, 25 Apr 2013 14:43:29 -0400 From: Eduardo Habkost Date: Thu, 25 Apr 2013 15:43:05 -0300 Message-Id: <1366915386-14728-7-git-send-email-ehabkost@redhat.com> In-Reply-To: <1366915386-14728-1-git-send-email-ehabkost@redhat.com> References: <1366915386-14728-1-git-send-email-ehabkost@redhat.com> Subject: [Qemu-devel] [RFC 6/7] target-i386: change CPUID model of 486 to 8 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= This changes the model number of 486 to 8 (DX4) which matches the feature set presented, and actually has the CPUID instruction. This adds compatibility calls to the pc-1.4 init function, to keep model=0 on pc-1.4 and older. Signed-off-by: H. Peter Anvin Signed-off-by: Eduardo Habkost --- This patch contains a chunk from a larger patch, sent by H. Peter Anvin at: Message-Id: <1362017554-1260-1-git-send-email-hpa@zytor.com> http://marc.info/?l=qemu-devel&m=136202143002609 I hope I'm doing the right thing by keeping hpa's signed-off-by line. --- hw/i386/pc_piix.c | 1 + hw/i386/pc_q35.c | 1 + target-i386/cpu.c | 2 +- 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 615d8f4..9372f77 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -238,6 +238,7 @@ static void pc_init_pci(QEMUMachineInitArgs *args) static void pc_init_pci_1_4(QEMUMachineInitArgs *args) { x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE); + x86_cpu_compat_set_model("486", 0); pc_init_pci(args); } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 3240203..fc566fd 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -212,6 +212,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args) static void pc_q35_init_1_4(QEMUMachineInitArgs *args) { x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE); + x86_cpu_compat_set_model("486", 0); pc_q35_init(args); } diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 592fed8..4fc7527 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -587,7 +587,7 @@ static x86_def_t builtin_x86_defs[] = { .level = 1, .vendor = CPUID_VENDOR_INTEL, .family = 4, - .model = 0, + .model = 8, .stepping = 0, .features[FEAT_1_EDX] = I486_FEATURES, -- 1.8.1.4