From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:48866) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXtgE-00030K-CG for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UXtg4-0004Y0-B3 for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:13 -0400 Received: from cantor2.suse.de ([195.135.220.15]:46626 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXtg4-0004Wr-1o for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:04 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 2 May 2013 15:35:45 +0200 Message-Id: <1367501755-32272-20-git-send-email-afaerber@suse.de> In-Reply-To: <1367501755-32272-1-git-send-email-afaerber@suse.de> References: <1367501755-32272-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 19/29] target-i386: Attach ICC bus to CPU on its creation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Igor Mammedov , Anthony Liguori , =?UTF-8?q?Andreas=20F=C3=A4rber?= From: Igor Mammedov X86CPU should have parent bus so it could provide bus for child APIC. Signed-off-by: Igor Mammedov Signed-off-by: Andreas F=C3=A4rber --- hw/i386/pc.c | 10 ++++++---- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- include/hw/i386/pc.h | 2 +- target-i386/cpu.c | 15 +++++++++++++-- target-i386/cpu.h | 3 ++- 6 files changed, 24 insertions(+), 10 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 6568173..c4c4e35 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -894,12 +894,13 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, i= nt level) } } =20 -static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id, Error = **errp) +static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id, + DeviceState *icc_bridge, Error **errp) { X86CPU *cpu; Error *local_err =3D NULL; =20 - cpu =3D cpu_x86_create(cpu_model, errp); + cpu =3D cpu_x86_create(cpu_model, icc_bridge, errp); if (!cpu) { return cpu; } @@ -917,7 +918,7 @@ static X86CPU *pc_new_cpu(const char *cpu_model, int6= 4_t apic_id, Error **errp) return cpu; } =20 -void pc_cpus_init(const char *cpu_model) +void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge) { int i; Error *error =3D NULL; @@ -932,7 +933,8 @@ void pc_cpus_init(const char *cpu_model) } =20 for (i =3D 0; i < smp_cpus; i++) { - pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), &error); + pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), + icc_bridge, &error); if (error) { fprintf(stderr, "%s\n", error_get_pretty(error)); error_free(error); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 0ce3fc2..251e18f 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -95,7 +95,7 @@ static void pc_init1(MemoryRegion *system_memory, object_property_add_child(qdev_get_machine(), "icc-bridge", OBJECT(icc_bridge), NULL); =20 - pc_cpus_init(cpu_model); + pc_cpus_init(cpu_model, icc_bridge); pc_acpi_init("acpi-dsdt.aml"); =20 if (kvmclock_enabled) { diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index a6ba809..f46295b 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -82,7 +82,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args) object_property_add_child(qdev_get_machine(), "icc-bridge", OBJECT(icc_bridge), NULL); =20 - pc_cpus_init(cpu_model); + pc_cpus_init(cpu_model, icc_bridge); pc_acpi_init("q35-acpi-dsdt.aml"); =20 kvmclock_create(); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index dd6bc24..d0bc972 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -78,7 +78,7 @@ extern int fd_bootchk; void pc_register_ferr_irq(qemu_irq irq); void pc_acpi_smi_interrupt(void *opaque, int irq, int level); =20 -void pc_cpus_init(const char *cpu_model); +void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); void pc_acpi_init(const char *default_dsdt); void *pc_memory_init(MemoryRegion *system_memory, const char *kernel_filename, diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 40d51be..a165bcf 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -41,6 +41,7 @@ #endif =20 #include "sysemu/sysemu.h" +#include "hw/cpu/icc_bus.h" #ifndef CONFIG_USER_ONLY #include "hw/xen/xen.h" #include "hw/sysbus.h" @@ -1618,7 +1619,8 @@ static void cpu_x86_register(X86CPU *cpu, const cha= r *name, Error **errp) object_property_set_str(OBJECT(cpu), def->model_id, "model-id", errp= ); } =20 -X86CPU *cpu_x86_create(const char *cpu_model, Error **errp) +X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, + Error **errp) { X86CPU *cpu =3D NULL; CPUX86State *env; @@ -1635,6 +1637,14 @@ X86CPU *cpu_x86_create(const char *cpu_model, Erro= r **errp) features =3D model_pieces[1]; =20 cpu =3D X86_CPU(object_new(TYPE_X86_CPU)); +#ifndef CONFIG_USER_ONLY + if (icc_bridge =3D=3D NULL) { + error_setg(&error, "Invalid icc-bridge value"); + goto out; + } + qdev_set_parent_bus(DEVICE(cpu), qdev_get_child_bus(icc_bridge, "icc= ")); + object_unref(OBJECT(cpu)); +#endif env =3D &cpu->env; env->cpu_model_str =3D cpu_model; =20 @@ -1659,7 +1669,7 @@ X86CPU *cpu_x86_init(const char *cpu_model) Error *error =3D NULL; X86CPU *cpu; =20 - cpu =3D cpu_x86_create(cpu_model, &error); + cpu =3D cpu_x86_create(cpu_model, NULL, &error); if (error) { goto out; } @@ -2346,6 +2356,7 @@ static void x86_cpu_common_class_init(ObjectClass *= oc, void *data) =20 xcc->parent_realize =3D dc->realize; dc->realize =3D x86_cpu_realizefn; + dc->bus_type =3D TYPE_ICC_BUS; =20 xcc->parent_reset =3D cc->reset; cc->reset =3D x86_cpu_reset; diff --git a/target-i386/cpu.h b/target-i386/cpu.h index ab151d5..f193752 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -897,7 +897,8 @@ typedef struct CPUX86State { #include "cpu-qom.h" =20 X86CPU *cpu_x86_init(const char *cpu_model); -X86CPU *cpu_x86_create(const char *cpu_model, Error **errp); +X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge, + Error **errp); int cpu_x86_exec(CPUX86State *s); void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf); void x86_cpudef_setup(void); --=20 1.8.1.4