From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:48923) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXtgH-00030T-O8 for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UXtg4-0004YC-Bu for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:17 -0400 Received: from cantor2.suse.de ([195.135.220.15]:46629 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UXtg4-0004Ww-3C for qemu-devel@nongnu.org; Thu, 02 May 2013 09:36:04 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 2 May 2013 15:35:49 +0200 Message-Id: <1367501755-32272-24-git-send-email-afaerber@suse.de> In-Reply-To: <1367501755-32272-1-git-send-email-afaerber@suse.de> References: <1367501755-32272-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 23/29] pc: Implement QEMUMachine::hot_add_cpu hook List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Igor Mammedov , Anthony Liguori , =?UTF-8?q?Andreas=20F=C3=A4rber?= From: Igor Mammedov Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Signed-off-by: Andreas F=C3=A4rber --- hw/i386/pc.c | 26 ++++++++++++++++++++++++++ hw/i386/pc_piix.c | 1 + hw/i386/pc_q35.c | 1 + include/hw/i386/pc.h | 1 + 4 files changed, 29 insertions(+) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 28f958d..197d218 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -54,6 +54,7 @@ #include "qemu/config-file.h" #include "hw/acpi/acpi.h" #include "hw/cpu/icc_bus.h" +#include "hw/boards.h" =20 /* debug PC/ISA interrupts */ //#define DEBUG_IRQ @@ -919,6 +920,30 @@ static X86CPU *pc_new_cpu(const char *cpu_model, int= 64_t apic_id, return cpu; } =20 +static const char *current_cpu_model; + +void pc_hot_add_cpu(const int64_t id, Error **errp) +{ + DeviceState *icc_bridge; + int64_t apic_id =3D x86_cpu_apic_id_from_index(id); + + if (cpu_exists(apic_id)) { + error_setg(errp, "Unable to add CPU: %" PRIi64 + ", it already exists", id); + return; + } + + if (id >=3D max_cpus) { + error_setg(errp, "Unable to add CPU: %" PRIi64 + ", max allowed: %d", id, max_cpus - 1); + return; + } + + icc_bridge =3D DEVICE(object_resolve_path_type("icc-bridge", + TYPE_ICC_BRIDGE, NULL))= ; + pc_new_cpu(current_cpu_model, apic_id, icc_bridge, errp); +} + void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge) { int i; @@ -933,6 +958,7 @@ void pc_cpus_init(const char *cpu_model, DeviceState = *icc_bridge) cpu_model =3D "qemu32"; #endif } + current_cpu_model =3D cpu_model; =20 for (i =3D 0; i < smp_cpus; i++) { cpu =3D pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i), diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 251e18f..fe52e5f 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -335,6 +335,7 @@ static QEMUMachine pc_i440fx_machine_v1_5 =3D { .alias =3D "pc", .desc =3D "Standard PC (i440FX + PIIX, 1996)", .init =3D pc_init_pci, + .hot_add_cpu =3D pc_hot_add_cpu, .max_cpus =3D 255, .is_default =3D 1, DEFAULT_MACHINE_OPTIONS, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index f46295b..52511e2 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -220,6 +220,7 @@ static QEMUMachine pc_q35_machine_v1_5 =3D { .alias =3D "q35", .desc =3D "Standard PC (Q35 + ICH9, 2009)", .init =3D pc_q35_init, + .hot_add_cpu =3D pc_hot_add_cpu, .max_cpus =3D 255, DEFAULT_MACHINE_OPTIONS, }; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index d0bc972..41869e5 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -79,6 +79,7 @@ void pc_register_ferr_irq(qemu_irq irq); void pc_acpi_smi_interrupt(void *opaque, int irq, int level); =20 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); +void pc_hot_add_cpu(const int64_t id, Error **errp); void pc_acpi_init(const char *default_dsdt); void *pc_memory_init(MemoryRegion *system_memory, const char *kernel_filename, --=20 1.8.1.4