From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: "Hervé Poussineau" <hpoussin@reactos.org>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH for 1.5] target-i386 ROR r8/r16 imm instruction fix
Date: Thu, 9 May 2013 19:40:27 +0200 [thread overview]
Message-ID: <1368121227-10885-1-git-send-email-aurelien@aurel32.net> (raw)
Fix EFLAGS corruption by ROR r8/r16 imm instruction located at the end
of the TB, similarly to commit 089305ac for the non-immediate case.
Reported-by: Hervé Poussineau <hpoussin@reactos.org>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
target-i386/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 524a0b4..0aeccdb 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -1871,6 +1871,7 @@ static void gen_rot_rm_im(DisasContext *s, int ot, int op1, int op2,
if (is_right) {
tcg_gen_shri_tl(cpu_cc_src2, cpu_T[0], mask - 1);
tcg_gen_shri_tl(cpu_cc_dst, cpu_T[0], mask);
+ tcg_gen_andi_tl(cpu_cc_dst, cpu_cc_dst, 1);
} else {
tcg_gen_shri_tl(cpu_cc_src2, cpu_T[0], mask);
tcg_gen_andi_tl(cpu_cc_dst, cpu_T[0], 1);
--
1.7.10.4
next reply other threads:[~2013-05-09 17:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-09 17:40 Aurelien Jarno [this message]
2013-05-09 17:41 ` [Qemu-devel] [PATCH for 1.5] target-i386 ROR r8/r16 imm instruction fix Richard Henderson
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