From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:50905) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UbmiK-0000M6-IG for qemu-devel@nongnu.org; Mon, 13 May 2013 02:58:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UbmiH-0000DH-Fa for qemu-devel@nongnu.org; Mon, 13 May 2013 02:58:28 -0400 Received: from mail-pd0-f171.google.com ([209.85.192.171]:42360) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UbmiH-0000CM-9U for qemu-devel@nongnu.org; Mon, 13 May 2013 02:58:25 -0400 Received: by mail-pd0-f171.google.com with SMTP id r11so4194514pdi.2 for ; Sun, 12 May 2013 23:58:24 -0700 (PDT) From: John Rigby Date: Mon, 13 May 2013 00:57:48 -0600 Message-Id: <1368428278-29299-2-git-send-email-john.rigby@linaro.org> In-Reply-To: <1368428278-29299-1-git-send-email-john.rigby@linaro.org> References: <1368428278-29299-1-git-send-email-john.rigby@linaro.org> Subject: [Qemu-devel] [PATCH v3 resend 01/11] ARM: Export cpu_env List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: 'Peter Maydell , John Rigby , Alexander Graf , Paul Brook From: Alexander Graf The cpu_env tcg variable will be used by both the AArch32 and AArch64 handling code. Unstaticify it, so that both sides can make use of it. Signed-off-by: Alexander Graf Signed-off-by: John Rigby --- Changes in v3: - None because consensus alternative to non static arm cpu_env was not clean and Richard Henderson pointed out that microblaze was still static so no conflict ... yet. target-arm/translate.c | 2 +- target-arm/translate.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 675773a..36537bd 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -59,7 +59,7 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE]; #define DISAS_WFI 4 #define DISAS_SWI 5 -static TCGv_ptr cpu_env; +TCGv_ptr cpu_env; /* We reuse the same 64-bit temporaries for efficiency. */ static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; static TCGv_i32 cpu_R[16]; diff --git a/target-arm/translate.h b/target-arm/translate.h index e727bc6..8ba1433 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -24,4 +24,6 @@ typedef struct DisasContext { int vec_stride; } DisasContext; +extern TCGv_ptr cpu_env; + #endif /* TARGET_ARM_TRANSLATE_H */ -- 1.8.2.2