From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: "John Rigby" <john.rigby@linaro.org>,
patches@linaro.org, "Blue Swirl" <blauwirbel@gmail.com>,
"Andreas Färber" <afaerber@suse.de>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH 08/10] target-arm: Remove gen_{ld, st}* from thumb2 decoder
Date: Thu, 23 May 2013 13:00:02 +0100 [thread overview]
Message-ID: <1369310404-5285-9-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1369310404-5285-1-git-send-email-peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate.c | 30 ++++++++++++++++++++----------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 953c5fb..0ca68fe 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8134,18 +8134,22 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
}
if (insn & (1 << 20)) {
/* ldrd */
- tmp = gen_ld32(addr, IS_USER(s));
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s));
store_reg(s, rs, tmp);
tcg_gen_addi_i32(addr, addr, 4);
- tmp = gen_ld32(addr, IS_USER(s));
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s));
store_reg(s, rd, tmp);
} else {
/* strd */
tmp = load_reg(s, rs);
- gen_st32(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st32(tmp, addr, IS_USER(s));
+ tcg_temp_free_i32(tmp);
tcg_gen_addi_i32(addr, addr, 4);
tmp = load_reg(s, rd);
- gen_st32(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st32(tmp, addr, IS_USER(s));
+ tcg_temp_free_i32(tmp);
}
if (insn & (1 << 21)) {
/* Base writeback. */
@@ -8181,10 +8185,12 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
/* tbh */
tcg_gen_add_i32(addr, addr, tmp);
tcg_temp_free_i32(tmp);
- tmp = gen_ld16u(addr, IS_USER(s));
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld16u(tmp, addr, IS_USER(s));
} else { /* tbb */
tcg_temp_free_i32(tmp);
- tmp = gen_ld8u(addr, IS_USER(s));
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld8u(tmp, addr, IS_USER(s));
}
tcg_temp_free_i32(addr);
tcg_gen_shli_i32(tmp, tmp, 1);
@@ -8219,9 +8225,11 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
if ((insn & (1 << 24)) == 0)
tcg_gen_addi_i32(addr, addr, -8);
/* Load PC into tmp and CPSR into tmp2. */
- tmp = gen_ld32(addr, 0);
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld32u(tmp, addr, 0);
tcg_gen_addi_i32(addr, addr, 4);
- tmp2 = gen_ld32(addr, 0);
+ tmp2 = tcg_temp_new_i32();
+ tcg_gen_qemu_ld32u(tmp2, addr, 0);
if (insn & (1 << 21)) {
/* Base writeback. */
if (insn & (1 << 24)) {
@@ -8259,7 +8267,8 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
continue;
if (insn & (1 << 20)) {
/* Load. */
- tmp = gen_ld32(addr, IS_USER(s));
+ tmp = tcg_temp_new_i32();
+ tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s));
if (i == 15) {
gen_bx(s, tmp);
} else if (i == rn) {
@@ -8271,7 +8280,8 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
} else {
/* Store. */
tmp = load_reg(s, i);
- gen_st32(tmp, addr, IS_USER(s));
+ tcg_gen_qemu_st32(tmp, addr, IS_USER(s));
+ tcg_temp_free_i32(tmp);
}
tcg_gen_addi_i32(addr, addr, 4);
}
--
1.7.9.5
next prev parent reply other threads:[~2013-05-23 12:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-23 11:59 [Qemu-devel] [PATCH 00/10] target-arm: fix TCGv usage (AArch64 prep) Peter Maydell
2013-05-23 11:59 ` [Qemu-devel] [PATCH 01/10] target-arm: Don't use TCGv when we mean TCGv_i32 Peter Maydell
2013-05-23 16:43 ` Richard Henderson
2013-05-23 11:59 ` [Qemu-devel] [PATCH 02/10] target-arm: Remove gen_ld64() and gen_st64() Peter Maydell
2013-05-23 16:44 ` Richard Henderson
2013-05-23 11:59 ` [Qemu-devel] [PATCH 03/10] target-arm: Remove uses of gen_{ld, st}* from iWMMXt code Peter Maydell
2013-05-23 16:46 ` Richard Henderson
2013-05-23 11:59 ` [Qemu-devel] [PATCH 04/10] target-arm: Remove uses of gen_{ld, st}* from Neon code Peter Maydell
2013-05-23 11:59 ` [Qemu-devel] [PATCH 05/10] target-arm: Remove use of gen_{ld, st}* from ldrex/strex Peter Maydell
2013-05-23 12:00 ` [Qemu-devel] [PATCH 06/10] target-arm: Remove gen_{ld, st}* from basic ARM insns Peter Maydell
2013-05-23 12:00 ` [Qemu-devel] [PATCH 07/10] target-arm: Remove gen_{ld, st}* from Thumb insns Peter Maydell
2013-05-23 12:00 ` Peter Maydell [this message]
2013-05-23 12:00 ` [Qemu-devel] [PATCH 09/10] target-arm: Remove gen_{ld, st}* definitions Peter Maydell
2013-05-23 12:00 ` [Qemu-devel] [PATCH 10/10] target-arm: Abstract out load/store from a vaddr in AArch32 Peter Maydell
2013-05-23 16:53 ` Richard Henderson
2013-05-24 15:54 ` Peter Maydell
2013-05-26 17:03 ` [Qemu-devel] [PATCH 00/10] target-arm: fix TCGv usage (AArch64 prep) Blue Swirl
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