From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45970) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UfvRr-0006n8-Im for qemu-devel@nongnu.org; Fri, 24 May 2013 13:06:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UfvRm-00023l-AW for qemu-devel@nongnu.org; Fri, 24 May 2013 13:06:35 -0400 Received: from mail-ea0-x22c.google.com ([2a00:1450:4013:c01::22c]:53167) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UfvRm-00023T-4j for qemu-devel@nongnu.org; Fri, 24 May 2013 13:06:30 -0400 Received: by mail-ea0-f172.google.com with SMTP id d10so2822055eaj.31 for ; Fri, 24 May 2013 10:06:29 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Fri, 24 May 2013 19:05:47 +0200 Message-Id: <1369415157-8953-13-git-send-email-pbonzini@redhat.com> In-Reply-To: <1369415157-8953-1-git-send-email-pbonzini@redhat.com> References: <1369415157-8953-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 12/22] exec: introduce memory_access_size List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org This will be used by address_space_access_valid too. Signed-off-by: Paolo Bonzini --- exec.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/exec.c b/exec.c index 7f6b5dd..519a82d 100644 --- a/exec.c +++ b/exec.c @@ -1865,6 +1865,17 @@ static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) return false; } +static inline int memory_access_size(int l, hwaddr addr) +{ + if (l >= 4 && ((addr & 3) == 0)) { + return 4; + } + if (l >= 2 && ((addr & 1) == 0)) { + return 2; + } + return 1; +} + void address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf, int len, bool is_write) { @@ -1880,23 +1891,21 @@ void address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf, if (is_write) { if (!memory_access_is_direct(section->mr, is_write)) { + l = memory_access_size(l, addr1); /* XXX: could force cpu_single_env to NULL to avoid potential bugs */ - if (l >= 4 && ((addr1 & 3) == 0)) { + if (l == 4) { /* 32 bit write access */ val = ldl_p(buf); io_mem_write(section->mr, addr1, val, 4); - l = 4; - } else if (l >= 2 && ((addr1 & 1) == 0)) { + } else if (l == 2) { /* 16 bit write access */ val = lduw_p(buf); io_mem_write(section->mr, addr1, val, 2); - l = 2; } else { /* 8 bit write access */ val = ldub_p(buf); io_mem_write(section->mr, addr1, val, 1); - l = 1; } } else { addr1 += memory_region_get_ram_addr(section->mr); @@ -1908,21 +1917,19 @@ void address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf, } else { if (!memory_access_is_direct(section->mr, is_write)) { /* I/O case */ - if (l >= 4 && ((addr1 & 3) == 0)) { + l = memory_access_size(l, addr1); + if (l == 4) { /* 32 bit read access */ val = io_mem_read(section->mr, addr1, 4); stl_p(buf, val); - l = 4; - } else if (l >= 2 && ((addr1 & 1) == 0)) { + } else if (l == 2) { /* 16 bit read access */ val = io_mem_read(section->mr, addr1, 2); stw_p(buf, val); - l = 2; } else { /* 8 bit read access */ val = io_mem_read(section->mr, addr1, 1); stb_p(buf, val); - l = 1; } } else { /* RAM case */ -- 1.8.1.4