Re: [PATCH] pnv/xive2: Allow indirect TIMA accesses of all sizes

[Daniel Henrique Barboza <danielhb413@gmail.com>]

Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,


Daniel

On 6/26/23 06:40, Frederic Barrat wrote:
> Booting linux on the powernv10 machine logs a few errors like:
> 
> Invalid read at addr 0x38, size 1, region 'xive-ic-tm-indirect', reason: invalid size (min:8 max:8)
> Invalid write at addr 0x38, size 1, region 'xive-ic-tm-indirect', reason: invalid size (min:8 max:8)
> Invalid read at addr 0x38, size 1, region 'xive-ic-tm-indirect', reason: invalid size (min:8 max:8)
> 
> Those errors happen when linux is resetting XIVE. We're trying to
> read/write the enablement bit for the hardware context and qemu
> doesn't allow indirect TIMA accesses of less than 8 bytes. Direct TIMA
> access can go through though, as well as indirect TIMA accesses on P9.
> So even though there are some restrictions regarding the address/size
> combinations for TIMA access, the example above is perfectly valid.
> 
> This patch lets indirect TIMA accesses of all sizes go through. The
> special operations will be intercepted and the default "raw" handlers
> will pick up all other requests and complain about invalid sizes as
> appropriate.
> 
> Tested-by: Nicholas Piggin <npiggin@gmail.com>
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
> ---
>   hw/intc/pnv_xive2.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index ed438a20ed..e8ab176de6 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -1644,11 +1644,11 @@ static const MemoryRegionOps pnv_xive2_ic_tm_indirect_ops = {
>       .write = pnv_xive2_ic_tm_indirect_write,
>       .endianness = DEVICE_BIG_ENDIAN,
>       .valid = {
> -        .min_access_size = 8,
> +        .min_access_size = 1,
>           .max_access_size = 8,
>       },
>       .impl = {
> -        .min_access_size = 8,
> +        .min_access_size = 1,
>           .max_access_size = 8,
>       },
>   };