From: Peter Maydell <peter.maydell@linaro.org>
To: Anthony Liguori <aliguori@us.ibm.com>
Cc: qemu-devel@nongnu.org, Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PULL 00/24] arm-devs queue
Date: Mon, 3 Jun 2013 17:29:57 +0100 [thread overview]
Message-ID: <1370277021-26129-1-git-send-email-peter.maydell@linaro.org> (raw)
Hi; here's the latest arm-devs pullreq. I had a lot of
cc'd mail to wade through putting this together so I wouldn't
be surprised if I missed a patch somewhere; if so please
ping the relevant patch.
Please pull.
thanks
-- PMM
The following changes since commit 8b779b368b3b45d5ed3160173499eeafee4d567c:
po/hu.po: Hungarian translation for the GTK+ interface (2013-06-03 08:39:11 -0500)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git arm-devs.next
for you to fetch changes up to 95669e69848eda87861e1ec3016562101542f543:
i.MX: Improve EPIT timer code. (2013-06-03 17:17:46 +0100)
----------------------------------------------------------------
Igor Mitsyanko (2):
hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region
exynos4210.c: register rom_mem for memory migration
Jean-Christophe DUBOIS (2):
i.MX: split GPT and EPIT timer implementation
i.MX: Improve EPIT timer code.
Peter Crosthwaite (20):
xilinx_spips: seperate SPI and QSPI as two classes
xilinx_spips: Make interrupts clear on read
xilinx_spips: Inhibit interrupts in LQSPI mode
xilinx_spips: Add verbose LQSPI debug output
xilinx_spips: Fix QSPI FIFO size
xilinx_spips: Trash LQ page cache on mode change
xilinx_spips: Add automatic start support
xilinx_spips: Implement automatic CS
xilinx_spips: lqspi: Dont touch config register
xilinx_spips: Fix CTRL register RW bits
xilinx_spips: Fix striping behaviour
xilinx_spips: Debug msgs for Snoop state
xilinx_spips: Multiple debug verbosity levels
xilinx_spips: lqspi: Push more data to tx-fifo
xilinx_spips: lqspi: Fix byte/misaligned access
sd/sdhci.c: Only reset data_count on new commands
sd/sdhci: Fix Buffer Write Ready interrupt
sd/sdhci.c: Fix bdata_read DPRINT message
sd/sdhci:ADMA: fix interrupt
sd/sd.c: Fix "inquiry" ACMD41
hw/arm/exynos4210.c | 28 ++-
hw/arm/xilinx_zynq.c | 2 +-
hw/sd/sd.c | 11 +-
hw/sd/sdhci.c | 28 +--
hw/ssi/xilinx_spips.c | 320 ++++++++++++++++++++------
hw/timer/Makefile.objs | 3 +-
hw/timer/imx_epit.c | 432 +++++++++++++++++++++++++++++++++++
hw/timer/{imx_timer.c => imx_gpt.c} | 366 +----------------------------
8 files changed, 735 insertions(+), 455 deletions(-)
create mode 100644 hw/timer/imx_epit.c
rename hw/timer/{imx_timer.c => imx_gpt.c} (58%)
next reply other threads:[~2013-06-03 17:34 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-03 16:29 Peter Maydell [this message]
2013-06-03 16:29 ` [Qemu-devel] [PULL 01/24] xilinx_spips: seperate SPI and QSPI as two classes Peter Maydell
2013-06-03 16:29 ` [Qemu-devel] [PULL 02/24] xilinx_spips: Make interrupts clear on read Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 03/24] xilinx_spips: Inhibit interrupts in LQSPI mode Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 04/24] xilinx_spips: Add verbose LQSPI debug output Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 05/24] xilinx_spips: Fix QSPI FIFO size Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 06/24] xilinx_spips: Trash LQ page cache on mode change Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 07/24] xilinx_spips: Add automatic start support Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 08/24] xilinx_spips: Implement automatic CS Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 09/24] xilinx_spips: lqspi: Dont touch config register Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 10/24] xilinx_spips: Fix CTRL register RW bits Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 11/24] xilinx_spips: Fix striping behaviour Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 12/24] xilinx_spips: Debug msgs for Snoop state Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 13/24] xilinx_spips: Multiple debug verbosity levels Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 14/24] xilinx_spips: lqspi: Push more data to tx-fifo Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 15/24] xilinx_spips: lqspi: Fix byte/misaligned access Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 16/24] sd/sdhci.c: Only reset data_count on new commands Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 17/24] sd/sdhci: Fix Buffer Write Ready interrupt Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 18/24] sd/sdhci.c: Fix bdata_read DPRINT message Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 19/24] sd/sdhci:ADMA: fix interrupt Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 20/24] sd/sd.c: Fix "inquiry" ACMD41 Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 21/24] i.MX: split GPT and EPIT timer implementation Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 22/24] hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 23/24] exynos4210.c: register rom_mem for memory migration Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 24/24] i.MX: Improve EPIT timer code Peter Maydell
2013-06-17 21:17 ` [Qemu-devel] [PULL 00/24] arm-devs queue Anthony Liguori
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1370277021-26129-1-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=aliguori@us.ibm.com \
--cc=paul@codesourcery.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).