From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42869) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UjZ1h-0007ct-8X for qemu-devel@nongnu.org; Mon, 03 Jun 2013 13:58:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UjZ1d-0002bz-H5 for qemu-devel@nongnu.org; Mon, 03 Jun 2013 13:58:37 -0400 Received: from 1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa ([2001:8b0:1d0::1]:57772 helo=mnementh.archaic.org.uk) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UjXeN-0006ZN-2Z for qemu-devel@nongnu.org; Mon, 03 Jun 2013 12:30:27 -0400 From: Peter Maydell Date: Mon, 3 Jun 2013 17:30:19 +0100 Message-Id: <1370277021-26129-23-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1370277021-26129-1-git-send-email-peter.maydell@linaro.org> References: <1370277021-26129-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 22/24] hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-devel@nongnu.org, Paul Brook From: Igor Mitsyanko Exynos SoC was misusing memory_region_init_ram_ptr(): this interface can safely be used only for memory regions which size is a multiple of target page size. Change chipid_and_omr memory to an mmio region to fix this. Signed-off-by: Igor Mitsyanko Message-id: 1368199981-45292-2-git-send-email-i.mitsyanko@gmail.com Signed-off-by: Peter Maydell --- hw/arm/exynos4210.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index c8101d3..502b106 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -79,6 +79,28 @@ static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43, 0x09, 0x00, 0x00, 0x00 }; +static uint64_t exynos4210_chipid_and_omr_read(void *opaque, hwaddr offset, + unsigned size) +{ + assert(offset < sizeof(chipid_and_omr)); + return chipid_and_omr[offset]; +} + +static void exynos4210_chipid_and_omr_write(void *opaque, hwaddr offset, + uint64_t value, unsigned size) +{ + return; +} + +static const MemoryRegionOps exynos4210_chipid_and_omr_ops = { + .read = exynos4210_chipid_and_omr_read, + .write = exynos4210_chipid_and_omr_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .max_access_size = 1, + } +}; + void exynos4210_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info) { @@ -219,9 +241,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, /*** Memory ***/ /* Chip-ID and OMR */ - memory_region_init_ram_ptr(&s->chipid_mem, "exynos4210.chipid", - sizeof(chipid_and_omr), chipid_and_omr); - memory_region_set_readonly(&s->chipid_mem, true); + memory_region_init_io(&s->chipid_mem, &exynos4210_chipid_and_omr_ops, + NULL, "exynos4210.chipid", sizeof(chipid_and_omr)); memory_region_add_subregion(system_mem, EXYNOS4210_CHIPID_ADDR, &s->chipid_mem); -- 1.7.9.5