From: Peter Maydell <peter.maydell@linaro.org>
To: Anthony Liguori <aliguori@us.ibm.com>
Cc: qemu-devel@nongnu.org, Paul Brook <paul@codesourcery.com>
Subject: [Qemu-devel] [PULL 02/24] xilinx_spips: Make interrupts clear on read
Date: Mon, 3 Jun 2013 17:29:59 +0100 [thread overview]
Message-ID: <1370277021-26129-3-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1370277021-26129-1-git-send-email-peter.maydell@linaro.org>
From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
By default these interrupts are clear on read.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 999ff0091ed3cc3969a431bf55c00ef934cecc8e.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/ssi/xilinx_spips.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 734adf0..261d948 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -330,6 +330,10 @@ static uint64_t xilinx_spips_read(void *opaque, hwaddr addr,
mask = 0x0002FFFF;
break;
case R_INTR_STATUS:
+ ret = s->regs[addr] & IXR_ALL;
+ s->regs[addr] = 0;
+ DB_PRINT("addr=" TARGET_FMT_plx " = %x\n", addr * 4, ret);
+ return ret;
case R_INTR_MASK:
mask = IXR_ALL;
break;
--
1.7.9.5
next prev parent reply other threads:[~2013-06-03 17:59 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-03 16:29 [Qemu-devel] [PULL 00/24] arm-devs queue Peter Maydell
2013-06-03 16:29 ` [Qemu-devel] [PULL 01/24] xilinx_spips: seperate SPI and QSPI as two classes Peter Maydell
2013-06-03 16:29 ` Peter Maydell [this message]
2013-06-03 16:30 ` [Qemu-devel] [PULL 03/24] xilinx_spips: Inhibit interrupts in LQSPI mode Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 04/24] xilinx_spips: Add verbose LQSPI debug output Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 05/24] xilinx_spips: Fix QSPI FIFO size Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 06/24] xilinx_spips: Trash LQ page cache on mode change Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 07/24] xilinx_spips: Add automatic start support Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 08/24] xilinx_spips: Implement automatic CS Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 09/24] xilinx_spips: lqspi: Dont touch config register Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 10/24] xilinx_spips: Fix CTRL register RW bits Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 11/24] xilinx_spips: Fix striping behaviour Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 12/24] xilinx_spips: Debug msgs for Snoop state Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 13/24] xilinx_spips: Multiple debug verbosity levels Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 14/24] xilinx_spips: lqspi: Push more data to tx-fifo Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 15/24] xilinx_spips: lqspi: Fix byte/misaligned access Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 16/24] sd/sdhci.c: Only reset data_count on new commands Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 17/24] sd/sdhci: Fix Buffer Write Ready interrupt Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 18/24] sd/sdhci.c: Fix bdata_read DPRINT message Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 19/24] sd/sdhci:ADMA: fix interrupt Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 20/24] sd/sd.c: Fix "inquiry" ACMD41 Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 21/24] i.MX: split GPT and EPIT timer implementation Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 22/24] hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 23/24] exynos4210.c: register rom_mem for memory migration Peter Maydell
2013-06-03 16:30 ` [Qemu-devel] [PULL 24/24] i.MX: Improve EPIT timer code Peter Maydell
2013-06-17 21:17 ` [Qemu-devel] [PULL 00/24] arm-devs queue Anthony Liguori
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