From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47932) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UjuZq-0007Kg-Im for qemu-devel@nongnu.org; Tue, 04 Jun 2013 12:59:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UjuZj-00014G-DK for qemu-devel@nongnu.org; Tue, 04 Jun 2013 12:59:18 -0400 Received: from mail-qc0-x230.google.com ([2607:f8b0:400d:c01::230]:59203) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UjuZj-000146-91 for qemu-devel@nongnu.org; Tue, 04 Jun 2013 12:59:11 -0400 Received: by mail-qc0-f176.google.com with SMTP id o10so295098qcv.35 for ; Tue, 04 Jun 2013 09:59:10 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 4 Jun 2013 09:58:33 -0700 Message-Id: <1370365114-21102-2-git-send-email-rth@twiddle.net> In-Reply-To: <1370365114-21102-1-git-send-email-rth@twiddle.net> References: <1370365114-21102-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 1/2] tcg: Use QEMU_BUILD_BUG_ON for CPU_TLB_ENTRY_BITS List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aurelien@aurel32.net Rather than a hand-coded version of the same thing. Signed-off-by: Richard Henderson --- include/exec/cpu-defs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index d8c64e9..2e5a9ba 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -99,7 +99,7 @@ typedef struct CPUTLBEntry { sizeof(uintptr_t))]; } CPUTLBEntry; -extern int CPUTLBEntry_wrong_size[sizeof(CPUTLBEntry) == (1 << CPU_TLB_ENTRY_BITS) ? 1 : -1]; +QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS)); #define CPU_COMMON_TLB \ /* The meaning of the MMU modes is defined in the target code. */ \ -- 1.8.1.4