From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58426) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UmBtG-0004QH-Lr for qemu-devel@nongnu.org; Mon, 10 Jun 2013 19:52:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UmBtB-0005HL-3F for qemu-devel@nongnu.org; Mon, 10 Jun 2013 19:52:46 -0400 Received: from merlin.infradead.org ([2001:4978:20e::2]:33845) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UmBtA-0005BI-QP for qemu-devel@nongnu.org; Mon, 10 Jun 2013 19:52:40 -0400 Message-ID: <1370908331.21510.28.camel@i7.infradead.org> From: David Woodhouse Date: Tue, 11 Jun 2013 00:52:11 +0100 In-Reply-To: <871u89v8u2.fsf@codemonkey.ws> References: <1370882347-31129-1-git-send-email-mst@redhat.com> <87r4g9rdwe.fsf@codemonkey.ws> <51B62C48.5060303@redhat.com> <87ehc920ym.fsf@codemonkey.ws> <51B63A74.1030905@redhat.com> <87mwqxzlke.fsf@codemonkey.ws> <20130610230557.GA13553@morn.localdomain> <871u89v8u2.fsf@codemonkey.ws> Content-Type: multipart/signed; micalg="sha-1"; protocol="application/x-pkcs7-signature"; boundary="=-DV5VW4kXZlrBY1G2RZYK" Mime-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH] qemu: piix: PCI bridge ACPI hotplug support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Peter Maydell , "Michael S. Tsirkin" , Laszlo Ersek , seabios@seabios.org, qemu-devel@nongnu.org, Kevin O'Connor , Gerd Hoffmann , Jordan Justen --=-DV5VW4kXZlrBY1G2RZYK Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2013-06-10 at 18:34 -0500, Anthony Liguori wrote: > Internally within QEMU, this initial discussion started by saying that > any ACPI generation within QEMU should happen strictly with QOM > methods. This was the crux of my argument, if QOM is the only > interface we need, everything is there for the firmware to do the same > job that QEMU would be doing. That's nice in theory, but I'm not sure how it works as things evolve and new things / new features get exposed. The firmware's *interpretation* of the QOM tree needs to be kept in sync with qemu. Hm, make that: The firmwares' *interpretation*=E2=80=A6 Let's take a specific, recent example. We fixed the PIIX4 code to actually handle the hard reset on port 0xcf9. We need to fix the ACPI tables to indicate a usable RESET_REG. How is that exposed in the QOM tree, and how does it all work? With qemu exposing ACPI tables in their close-to-final form, it's just fine. Boot with a recent qemu and it's all nice and shiny; boot with an old qemu and it doesn't reset properly. But if the firmware has to be updated to interpret the new feature advertised in the QOM tree and translate it into the ACPI table, then we haven't really got much of an improvement. Please explain how this is supposed to work in *practice*. --=20 dwmw2 --=-DV5VW4kXZlrBY1G2RZYK Content-Type: application/x-pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExCzAJBgUrDgMCGgUAMIAGCSqGSIb3DQEHAQAAoIISxDCCBjQw ggQcoAMCAQICAR4wDQYJKoZIhvcNAQEFBQAwfTELMAkGA1UEBhMCSUwxFjAUBgNVBAoTDVN0YXJ0 Q29tIEx0ZC4xKzApBgNVBAsTIlNlY3VyZSBEaWdpdGFsIENlcnRpZmljYXRlIFNpZ25pbmcxKTAn BgNVBAMTIFN0YXJ0Q29tIENlcnRpZmljYXRpb24gQXV0aG9yaXR5MB4XDTA3MTAyNDIxMDE1NVoX DTE3MTAyNDIxMDE1NVowgYwxCzAJBgNVBAYTAklMMRYwFAYDVQQKEw1TdGFydENvbSBMdGQuMSsw KQYDVQQLEyJTZWN1cmUgRGlnaXRhbCBDZXJ0aWZpY2F0ZSBTaWduaW5nMTgwNgYDVQQDEy9TdGFy dENvbSBDbGFzcyAxIFByaW1hcnkgSW50ZXJtZWRpYXRlIENsaWVudCBDQTCCASIwDQYJKoZIhvcN AQEBBQADggEPADCCAQoCggEBAMcJg8zOLdgasSmkLhOrlr6KMoOMpohBllVHrdRvEg/q6r8jR+EK 75xCGhR8ToREoqe7zM9/UnC6TS2y9UKTpT1v7RSMzR0t6ndl0TWBuUr/UXBhPk+Kmy7bI4yW4urC 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